EP1S10F484I6 Altera, EP1S10F484I6 Datasheet - Page 803

• Manufacturer Part Number: EP1S10F484I6
• Description: IC STRATIX FPGA 10K LE 484-FBGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S10F484I6

• Number Of Logic Elements/cells: 10570
• Number Of Labs/clbs: 1057
• Total Ram Bits: 920448
• Number Of I /o: 335
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 484-FBGA
• Family Name: Stratix
• Number Of Logic Blocks/elements: 10570
• # I/os (max): 335
• Frequency (max): 450.05MHz
• Process Technology: 0.13um (CMOS)
• Operating Supply Voltage (typ): 1.5V
• Logic Cells: 10570
• Ram Bits: 920448
• Operating Supply Voltage (min): 1.425V
• Operating Supply Voltage (max): 1.575V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Not Compliant

Altera Corporation
September 2004
wraps around the top of the memory and fills up the bottom boot area.
The wrap around does not occur if the bottom boot area is used for
processor/user HEX data file storage.
The block addressing mode allows better control of flash memory
allocation. You can allocate a specific flash memory region for each
application configuration page. This allocation is done by specifying a
block starting and block ending address. While selecting the size of the
region, you should account for growth in compressed configuration
bitstream sizes due to design changes and additions. In local update
mode, all configuration data is top justified within this allotted memory.
In other words, the last byte of configuration data is stored such that it
coincides with the highest byte address location within the allotted space.
Lower unused memory address locations within the allotted region are
filled with 1's. These filler bits are transmitted during a configuration
cycle using page 1, but are ignored by the Stratix device. The memory
map output file provides the exact byte address where real configuration
data for page 1 begins. Note that any partial update of page 1 should erase
all allotted flash sectors before storing new configuration data.
In the block addressing mode, HEX input files can be optionally added to
the bottom boot and main flash data areas (one HEX file per area is
allowed). The HEX file can be stored with relative addressing or absolute
addressing. For more information on relative and absolute addressing,
see the Using Altera Enhanced Configuration Devices chapter of the
Configuration Handbook.
Figures 12–14
initial programming file with block addressing for local update mode.
This example also illustrates preloading user HEX data into bottom boot
and main flash sectors.
1.
2.
OPTION BITS 0x00010000
PAGE 0
PAGE 1
Open the Convert Programming Files window from the File menu.
Select Programmer Object File (.pof) from the drop-down list titled
Programming file type.
Block
Remote System Configuration with Stratix & Stratix GX Devices
and 12–15, and the following steps illustrate generating an
0x00010040
0x001CB372
Start Address
Stratix Device Handbook, Volume 2
0x0001003F
0x00054CC8
0x0000FFFD wrapped around
End Address
12–25