MC7448VU1700LD Freescale Semiconductor, MC7448VU1700LD Datasheet - Page 28

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MC7448VU1700LD

Manufacturer Part Number
MC7448VU1700LD
Description
IC MPU RISC 32BIT 360-FCCBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC7448VU1700LD

Processor Type
MPC74xx PowerPC 32-Bit
Speed
1.7GHz
Voltage
1.3V
Mounting Type
Surface Mount
Package / Case
360-FCCBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-

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Pinout Listings
28
VDD_SENSE
Notes:
1. OV
2. Unused address pins must be pulled down to GND and corresponding address parity pins pulled up to OV
3. These pins require weak pull-up resistors (for example, 4.7 KΩ) to maintain the control signals in the negated state after they
4. This signal selects between MPX bus mode (asserted) and 60x bus mode (negated) and will be sampled at HRESET going
5. This signal must be negated during reset, by pull-up resistor to OV
6. Internal pull up on die.
7. Not used in 60x bus mode.
8. These signals must be pulled down to GND if unused, or if the MPC7448 is in 60x bus mode.
9. These input signals are for factory use only and must be pulled down to GND for normal machine operation.
10.This test signal is recommended to be tied to HRESET; however, other configurations will not adversely affect performance.
11.These signals are for factory use only and must be left unconnected for normal machine operation. Some pins that were
12.These input signals are for factory use only and must be pulled up to OV
13.This pin can externally cause a performance monitor event. Counting of the event is enabled through software.
14.This signal must be asserted during reset, by pull down to GND or assertion by HRESET, to ensure proper operation.
15.These pins were NCs on the MPC7447, MPC7445, and MPC7441. See
16.These pins were OV
17.These pins provide connectivity to the on-chip temperature diode that can be used to determine the die junction temperature
18.These pins are internally connected to V
19.These pins are internally connected to GND and are intended to allow an external device to detect the processor ground
20.These pins were in the TEST[0:4] factory test pin group on the MPC7447A, MPC7447, MPC7445, and MPC7441. They have
21.These pins can be used to enable the supported dynamic frequency switching (DFS) modes via hardware. If both are pulled
22.This pin is provided to allow operation of the L2 cache at low core voltages and is for factory use only. See the MPC7450
processor core, and AV
the pull-down resistor should be less than 250 Ω. Because these settings may change in future products, it is recommended
BVSEL[0:1] be configured using resistor options, jumpers, or some other flexible means, with the capability to reconfigure
the termination of this signal in the future if necessary. For actual recommended value of V
have been actively negated and released by the MPC7448 and other bus masters.
high.
ensure proper operation.
NCs on the MPC7447, MPC7445, and MPC7441 have now been defined for other purposes.
more information.
are intended to allow an external device (such as a power supply) to detect the I/O voltage level present inside the device
package. If unused, it is recommended they be connected to test points to facilitate system debug; otherwise, they may be
connected directly to OV
of the processor. These pins may be left unterminated if unused.
the processor core voltage level present inside the device package. If unused, it is recommended they be connected to test
points to facilitate system debug; otherwise, they may be connected directly to V
voltage level present inside the device package. If unused, it is recommended they be connected to test points to facilitate
system debug; otherwise, they may be connected directly to GND or left unconnected.
been assigned new functions on the MPC7448.
down, DFS mode is disabled completely and cannot be enabled via software. If unused, they should be pulled up to OV
to allow software control of DFS. See the MPC7450 RISC Microprocessor Family Reference Manual for more information.
RISC Microprocessor Family Reference Manual for more information.
Signal Name
DD
supplies power to the processor bus, JTAG, and all control signals, and is configurable. (V
Table 11. Pinout Listing for the MPC7448, 360 HCTE Package (continued)
G13, N12
DD
DD
pins on the MPC7447, MPC7445, and MPC7441. These pins are internally connected to OV
DD
MPC7448 RISC Microprocessor Hardware Specifications, Rev. 4
supplies power to the PLL after filtering from V
or left unconnected.
DD
and are intended to allow an external device (such as a power supply) to detect
Pin Number
DD
or negation by ¬HRESET (inverse of HRESET), to
DD
Section 9.3, “Connection Recommendations,”
DD
). To program the I/O voltage, see
for normal machine operation.
DD
or left unconnected.
in
or supply voltages see
Active
DD
Freescale Semiconductor
supplies power to the
I/O
DD
Table
.
3. If used,
Notes
Table
DD
18
and
for
DD
4.

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