MC7448VU1700LD Freescale Semiconductor, MC7448VU1700LD Datasheet - Page 42

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MC7448VU1700LD

Manufacturer Part Number
MC7448VU1700LD
Description
IC MPU RISC 32BIT 360-FCCBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC7448VU1700LD

Processor Type
MPC74xx PowerPC 32-Bit
Speed
1.7GHz
Voltage
1.3V
Mounting Type
Surface Mount
Package / Case
360-FCCBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-

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System Design Information
9.4
The MPC7448 processor bus drivers are characterized over process, voltage, and temperature. To measure
Z
varied until the pad voltage is OV
The output impedance is the average of two components—the resistances of the pull-up and pull-down
devices. When data is held low, SW2 is closed (SW1 is open), and R
pad equals OV
SW1 is closed (SW2 is open), and R
becomes the resistance of the pull-up devices. R
Then, Z
Table 15
and is relatively unaffected by bus voltage.
9.5
The MPC7448 requires high-resistive (weak: 4.7-KΩ) pull-up resistors on several control pins of the bus
interface to maintain the control signals in the negated state after they have been actively negated and
released by the MPC7448 or other bus masters. These pins are: TS, ARTRY, SHDO, and SHD1.
Some pins designated as being factory test pins must be pulled up to OV
proper device operation. The pins that must be pulled up to OV
pins that must be pulled down to GND are L1_TSTCLK and TEST[4]. The CKSTP_IN signal should
42
0
, an external resistor is connected from the chip pad to OV
0
summarizes the signal impedance results. The impedance increases with junction temperature
= (R
Output Buffer DC Impedance
Pull-Up/Pull-Down Resistor Requirements
Z
0
P
DD
+ R
/2. R
N
Typical
Maximum
)/2.
N
MPC7448 RISC Microprocessor Hardware Specifications, Rev. 4
Impedance
then becomes the resistance of the pull-down devices. When data is held high,
Figure 20. Driver Impedance Measurement
Data
At recommended operating conditions. See
DD
Table 15. Impedance Characteristics
P
/2.
is trimmed until the voltage at the pad equals OV
Figure 20
P
and R
shows the driver impedance measurement.
N
are designed to be close to each other in value.
Pad
R
R
DD
OV
OGND
N
P
DD
DD
or GND. The value of each resistor is
Table 4
Processor Bus
are LSSD_MODE and TEST[0:3]; the
SW2
SW1
N
33–42
31–51
is trimmed until the voltage at the
DD
or down to GND to ensure
Freescale Semiconductor
DD
/2. R
Unit
P
Ω
Ω
then

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