SC18IS602BIPW,112 NXP Semiconductors, SC18IS602BIPW,112 Datasheet - Page 8

IC BRIDGE SPI/I2C 16-TSSOP

SC18IS602BIPW,112

Manufacturer Part Number
SC18IS602BIPW,112
Description
IC BRIDGE SPI/I2C 16-TSSOP
Manufacturer
NXP Semiconductors
Datasheets

Specifications of SC18IS602BIPW,112

Controller Type
I²C Bus Controller
Interface
I²C
Voltage - Supply
2.4 V ~ 3.6 V
Current - Supply
11mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP
Operating Temperature Classification
Military
Operating Temperature (max)
125C
Package Type
TSSOP
Rad Hardened
No
Maximum Operating Frequency
4.5 MHz
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 55 C
Mounting Style
SMD/SMT
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.4 V
For Use With
568-4705 - DEMO BOARD I2C TO SPI SC18IS602
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-4785-5
935286182112
SC18IS602BIPW
SC18IS602BIPW,112
SC18IS602BIPW

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SC18IS602BIPW,112
Manufacturer:
NXP
Quantity:
463
NXP Semiconductors
SC18IS602_602B_603_4
Product data sheet
7.1.6 Clear Interrupt - Function ID F1h
7.1.7 Idle mode - Function ID F2h
7.1.8 GPIO Write - Function ID F4h
An interrupt is generated by the SC18IS602/602B/603 after any SPI transmission has
been completed. This interrupt can be cleared (INT pin HIGH) by sending a ‘Clear
Interrupt’ command. It is not necessary to clear the interrupt; when polling the device, this
function may be ignored.
A low-power mode may be entered by sending the ‘Idle Mode’ command.
The Idle mode will be exited when its I
The state of the pins defined as GPIO may be changed using the Port Write function.
The data byte following the F4h command will determine the state of SS3, SS2, SS1, and
SS0, if they are configured as GPIO. The Port Enable function will define if these pins are
used as SPI Slave Selects or if they are GPIO.
Table 6.
[1]
Bit
Symbol
Reset
Fig 11. Clear Interrupt
Fig 12. Idle mode
Fig 13. GPIO Write
SS3 does not exist in the SC18IS603.
GPIO Write (F0h) bit allocation
X
X
7
S
SLAVE ADDRESS
Rev. 04 — 11 March 2008
6
X
X
S
S
SLAVE ADDRESS
SLAVE ADDRESS
X
X
5
W
2
C-bus address is detected.
A
W
W
4
X
X
SC18IS602/602B/603
F4h
A
A
SS3
F1h
F2h
A
3
0
[1]
002aac452
002aac453
DATA
A
A
SS2
P
P
2
0
002aac454
I
2
A
C-bus to SPI bridge
P
© NXP B.V. 2008. All rights reserved.
SS1
1
0
SS0
0
0
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