PIC18F2431-I/SP Microchip Technology Inc., PIC18F2431-I/SP Datasheet - Page 109

• Manufacturer Part Number: PIC18F2431-I/SP
• Description: Microcontroller; 16 KB Flash; 768 RAM; 256 EEPROM; 24 I/O; 28-Pin-SPDIP
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F2431-I/SP

• A/d Inputs: 5-Channel, 10-Bit
• Cpu Speed: 10 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 24
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 16K Bytes
• Ram Size: 768 Bytes
• Speed: 40 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

10.0
Depending on the device selected and features
enabled, there are up to five ports available. Some pins
of the I/O ports are multiplexed with an alternate
function from the peripheral features on the device. In
general, when a peripheral is enabled, that pin may not
be used as a general purpose I/O pin.
Each port has three registers for its operation. These
registers are:
• TRIS register (data direction register)
• PORT register (reads the levels on the pins of the
• LAT register (output latch)
The data latch (LAT register) is useful for read-modify-
write operations on the value that the I/O pins are
driving.
A simplified model of a generic I/O port without the
interfaces to other peripherals is shown in Figure 10-1.
FIGURE 10-1:
 2003 Microchip Technology Inc.
device)
Note 1:
RD LAT
Data
Bus
WR LAT
or PORT
WR TRIS
RD TRIS
RD PORT
I/O PORTS
I/O pins have diode protection to V
TRIS Latch
Data Latch
D
D
CK
CK
GENERIC I/O PORT
OPERATION
Q
Q
Q
EN
EN
D
DD
and V
PIC18F2331/2431/4331/4431
I/O pin
Input
Buffer
SS
.
(1)
Preliminary
10.1
PORTA is a 8-bit wide, bidirectional port. The corre-
sponding data direction register is TRISA. Setting a
TRISA bit (= 1) will make the corresponding PORTA pin
an input (i.e., put the corresponding output driver in a
High-Impedance mode). Clearing a TRISA bit (= 0) will
make the corresponding PORTA pin an output (i.e., put
the contents of the output latch on the selected pin).
Reading the PORTA register reads the status of the
pins, whereas writing to it, will write to the port latch.
The Data Latch register (LATA) is also memory mapped.
Read-modify-write operations on the LATA register read
and write the latched output value for PORTA.
The RA<2:4> pins are multiplexed with three input
capture pins and Quadrature Encoder Interface pins.
Pins RA6 and RA7 are multiplexed with the main
oscillator pins; they are enabled as oscillator or I/O pins
by the selection of the main oscillator in Configuration
Register 1H (see Section 22.1 “Configuration Bits”
for details). When they are not used as port pins, RA6
and RA7 and their associated TRIS and LAT bits are
read as ‘0’.
The other PORTA pins are multiplexed with analog
inputs, the analog V
parator voltage reference output. The operation of pins
RA3:RA0 and RA5 as A/D converter inputs is selected
by clearing/setting the control bits in the ANSEL0 and
ANSEL1 registers.
The TRISA register controls the direction of the RA
pins, even when they are being used as analog inputs.
The user must ensure the bits in the TRISA register are
maintained set when using them as analog inputs.
EXAMPLE 10-1:
CLRF
CLRF
MOVLW
MOVWF
MOVLW
MOVWF
Note 1: On a Power-on Reset, RA5:RA0 are con-
2: RA5 I/F is available only on 40-pin
PORTA, TRISA and LATA
Registers
PORTA
LATA
0x3F
ANSEL0 ; for digital inputs
0xCF
TRISA
figured as analog inputs and read as ‘0’.
devices (PIC18F4X31).
REF
; Initialize PORTA by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Configure A/D
; Value used to
; initialize data
; direction
; Set RA<3:0> as inputs
; RA<5:4> as outputs
INITIALIZING PORTA
+ and V
REF
- inputs and the com-
DS39616B-page 107