PIC18F2431-I/SP Microchip Technology Inc., PIC18F2431-I/SP Datasheet - Page 254

• Manufacturer Part Number: PIC18F2431-I/SP
• Description: Microcontroller; 16 KB Flash; 768 RAM; 256 EEPROM; 24 I/O; 28-Pin-SPDIP
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F2431-I/SP

• A/d Inputs: 5-Channel, 10-Bit
• Cpu Speed: 10 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 24
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 16K Bytes
• Ram Size: 768 Bytes
• Speed: 40 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC18F2331/2431/4331/4431
20.1.3
The ACMOD<1:0> bits control the sequencing of the
A/D conversions. When ACSCH = 0, the A/D is
configured to sample and convert a single channel.
The ACMOD bits select which group to perform the
conversions and the GxSEL<1:0> bits select which
channel in the group is to be converted. If Single-shot
mode is enabled, the A/D interrupt flag will be set after
the channel is converted. If Continuous Loop mode is
enabled, the A/D interrupt flag will be set according to
the ADRS<1:0> bits.
When ACSHC = 1, multiple channel sequencing is
enabled and two sub-modes can be selected. The first
mode is Sequential mode with two settings. The first
setting is called SEQM1 and first samples and converts
the selected Group A channel and then samples and
converts the selected Group B channel. The second
mode is called SEQM2, and it samples and converts a
Group A channel, Group B channel, Group C channel
and finally a Group D channel.
The second multiple channel sequencing sub-mode is
Simultaneous Sampling mode. In this mode, there are
also two settings. The first setting is called STNM1 and
uses the two sample and hold circuits on the A/D
module. The selected Group A and B channels are
simultaneously sampled and then the Group A channel
is converted followed by the conversion of the Group B
channel. The second setting is called STNM2 and
starts the same as STNM1 but follows it with a
simultaneous sample of Group C and D channels. The
A/D module will then convert the Group C channel
followed by the Group D channel.
20.1.4
The PIC18F2331/2431/4331/4431 devices are capable
of triggering conversions from many different sources.
The same method used by all other microcontrollers of
setting the GO/DONE bit still works. The other trigger
sources are:
• RC3/INT0 pin
• Timer5 Overflow
• Input Capture 1 (IC1)
• CCP2 Compare Match
• Power Control PWM rising edge
These triggers are enabled using the SSRC<4:0> bits
(ADCON3<4:0>). Any combination of the five sources
can trigger a conversion by simply setting the corre-
sponding bit in ADCON3. When the trigger occurs, the
GO/DONE bit is automatically set by the hardware and
then cleared once the conversion completes.
DS39616B-page 252
CONVERSION SEQUENCING
TRIGGERING A/D CONVERSIONS
Preliminary
20.1.5
The following steps should be followed to initialize the
A/D module:
1.
2.
3.
4.
5.
6.
Configure the A/D module:
a)
b)
c)
d)
e)
Configure A/D interrupt (if required):
a)
b)
c)
d)
e)
f)
Turn On ADC:
a)
b)
Start sample/conversion sequence:
a)
b)
Wait
complete using one of the following options:
a)
b)
c)
Read A/D results, clear ADIF flag, reconfigure
trigger.
Configure analog pins, voltage reference
and digital I/O
Select A/D input channels
Select A/D Auto-conversion mode
(Single-shot or Continuous Loop)
Select A/D conversion clock
Select A/D conversion trigger
Set GIE bit
Set PEIE bit
Set ADIE bit
Clear ADIF bit
Select A/D trigger setting
Select A/D interrupt priority
Set ADON bit in ADCON0 register
Wait the required power-up setup time,
about 5-10 µs
Sample for a minimum of 2T
conversion by setting the GO/DONE bit.
The GO/DONE bit is set by the user in
software or by the module if initiated by a
trigger.
If T
then setting the GO/DONE bit starts a
sample period of the T
a conversion.
Poll for the GO/DONE bit to be cleared if in
Single-shot mode.
Wait for the A/D interrupt flag (ADIF) to be
set.
Poll for the BFEMT bit to be cleared to
signify that at least the first conversion has
completed.
A/D MODULE INITIALIZATION
STEPS
for
ACQ
is assigned a value (multiple of T
A/D
conversion/conversions
 2003 Microchip Technology Inc.
ACQ
value, then starts
AD
and start
AD
to
),