PIC18F2431-I/SP Microchip Technology Inc., PIC18F2431-I/SP Datasheet - Page 194

• Manufacturer Part Number: PIC18F2431-I/SP
• Description: Microcontroller; 16 KB Flash; 768 RAM; 256 EEPROM; 24 I/O; 28-Pin-SPDIP
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F2431-I/SP

• A/d Inputs: 5-Channel, 10-Bit
• Cpu Speed: 10 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 24
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 16K Bytes
• Ram Size: 768 Bytes
• Speed: 40 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC18F2331/2431/4331/4431
17.4.4
This mode is available in Up/Down Counting mode. In
the Double Update mode (PTMOD<1:0> = 11), an
interrupt event is generated each time the PTMR
register is equal to zero and each time the PTMR
matches with PTPER register. Figure 17-8 shows the
interrupts in Up/Down Counting mode with double
updates.
The Double Update mode provides two additional
functions to the user in Center-Aligned mode.
1.
2.
FIGURE 17-8:
DS39616B-page 192
PTMR_INT_REQ
PTMR_INT_REQ
A: PRESCALER = 1:1
Note 1: Interrupt flag bit PTIF is sampled here (every Q1).
PTDIR bit
The control loop bandwidth is doubled because
the PWM duty cycles can be updated twice per
period.
Asymmetrical center-aligned PWM waveforms
can be generated, which are useful for
minimizing output waveform distortion in certain
motor control applications.
PTMR
PTMR
PTDIR bit
PTIF bit
OSC1
PTIF bit
OSC1
2: PWM Time Base Period register, PTPER, is loaded with the value 3FFh for this example.
INTERRUPTS IN DOUBLE UPDATE
MODE
Case 1: PTMR Counting Upwards
Case 2: PTMR Counting Downwards
Q1
Q1
1
1
Q2
Q2
PWM TIME BASE INTERRUPTS, UP/DOWN COUNTING MODE WITH DOUBLE
3FDh
002h
UPDATES
Q3
Q3
Q4
Q4
Q1
1
Q1
1
Q2
Q2
3FEh
001h
Q3
Q3
Preliminary
Q4
Q4
Q1
Q1
1
1
2
Q2
Q2
3FFh
000h
Note:
Q3
Q3
Q4
Q4
Do not change PTMOD while PTEN is
active. It will yield unexpected results. To
change PWM Timer mode of operation,
first clear PTEN bit, load PTMOD with
required data and then set PTEN.
Q1
1
Q1
1
Q2
Q2
3FEh
001h
Q3
Q3
 2003 Microchip Technology Inc.
Q4
Q4
Q1
Q1
Q2
Q2
3FDh
002h
Q3
Q3
Q4
Q4