PIC18F2431-I/SP Microchip Technology Inc., PIC18F2431-I/SP Datasheet - Page 364

• Manufacturer Part Number: PIC18F2431-I/SP
• Description: Microcontroller; 16 KB Flash; 768 RAM; 256 EEPROM; 24 I/O; 28-Pin-SPDIP
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F2431-I/SP

• A/d Inputs: 5-Channel, 10-Bit
• Cpu Speed: 10 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 24
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 16K Bytes
• Ram Size: 768 Bytes
• Speed: 40 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC18F2331/2431/4331/4431
FIGURE 25-12:
TABLE 25-12: EXAMPLE SPI MODE REQUIREMENTS (MASTER MODE, CKE = 1)
DS39616B-page 362
Param.
71
71A
72
72A
73
73A
74
75
76
78
79
80
81
Note 1:
No.
Note:
(CKP = 0)
(CKP = 1)
SDI
SCK
SDO
SS
SCK
2:
TscH
TscL
TdiV2scH,
TdiV2scL
T
TscH2diL,
TscL2diL
TdoR
TdoF
TscR
TscF
TscH2doV,
TscL2doV
TdoV2scH,
TdoV2scL
B
Symbol
Requires the use of Parameter # 73A.
Only if Parameter # 71A and # 72A are used.
Refer to Figure 25-4 for load conditions.
2
B
EXAMPLE SPI MASTER MODE TIMING (CKE = 1)
SCK input high time
(Slave mode)
SCK input low time
(Slave mode)
Setup time of SDI data input to SCK edge
Last clock edge of Byte1 to the 1st clock edge
of Byte2
Hold time of SDI data input to SCK edge
SDO data output rise time
SDO data output fall time
SCK output rise time
(Master mode)
SCK output fall time (Master mode)
SDO data output valid after
SCK edge
SDO data output setup to SCK edge
81
73
MSb IN
MSb
74
71
Characteristic
75, 76
80
72
bit6 - - - - - -1
bit6 - - - -1
Preliminary
Continuous
Single Byte
Continuous
Single Byte
PIC18FXX31
PIC18LFXX31
PIC18FXX31
PIC18LFXX31
PIC18FXX31
PIC18LFXX31
LSb IN
LSb
1.25 T
1.25 T
1.5 T
Min
100
100
T
40
40
CY
—
—
—
—
—
CY
CY
CY
79
78
+ 40
+ 30
+ 30
 2003 Microchip Technology Inc.
Max Units
100
25
45
25
25
45
25
50
—
—
—
—
—
—
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(Note 1)
(Note 1)
(Note 2)
Conditions