PIC18F2431-I/SP Microchip Technology Inc., PIC18F2431-I/SP Datasheet - Page 159

• Manufacturer Part Number: PIC18F2431-I/SP
• Description: Microcontroller; 16 KB Flash; 768 RAM; 256 EEPROM; 24 I/O; 28-Pin-SPDIP
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F2431-I/SP

• A/d Inputs: 5-Channel, 10-Bit
• Cpu Speed: 10 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 24
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 16K Bytes
• Ram Size: 768 Bytes
• Speed: 40 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

The CCPR1H register and a 2-bit internal latch are
used to double buffer the PWM duty cycle. This double
buffering is essential for glitchless PWM operation.
When the CCPR1H and 2-bit latch match TMR2,
concatenated with an internal 2-bit Q clock or two bits
of the TMR2 prescaler, the CCP1 pin is cleared. The
maximum PWM resolution (bits) for a given PWM
frequency is given by the following equation.
EQUATION 15-3:
TABLE 15-3:
TABLE 15-4:
 2003 Microchip Technology Inc.
INTCON
PIR1
PIE1
IPR1
TRISC
TMR2
PR2
T2CON
CCPR1L
CCPR1H
CCP1CON
CCPR2L
CCPR2H
CCP2CON
Legend:
Timer Prescaler (1, 4, 16)
PR2 Value
Maximum Resolution (bits)
Note:
Name
PWM Resolution (max) =
PWM Frequency
x = unknown, u = unchanged, – = unimplemented, read as ‘0’. Shaded cells are not used by PWM and Timer2.
PORTC Data Direction Register
Timer2 Module Register
Timer2 Module Period Register
Capture/Compare/PWM Register1 (LSB)
Capture/Compare/PWM Register1 (MSB)
Capture/Compare/PWM Register2 (LSB)
Capture/Compare/PWM Register2 (MSB)
If the PWM duty cycle value is longer than
the PWM period, the CCP1 pin will not be
cleared.
GIE/GIEH PEIE/GIEL
Bit 7
—
—
—
—
—
—
REGISTERS ASSOCIATED WITH PWM AND TIMER2
EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 40 MHz
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000
ADIF
ADIE
ADIP
Bit 6
—
—
log
TMR0IE


log(2)
DC1B1
DC2B1
RCIE
RCIP
F
RCIF
2.44 kHz
Bit 5
F
PWM
OSC
FFh
16
10


bits
INT0IE
DC1B0
DC2B0
PIC18F2331/2431/4331/4431
TXIE
TXIP
Bit 4
TXIF
9.77 kHz
Preliminary
FFh
10
4
CCP1M3
CCP2M3
SSPIF
SSPIE
SSPIP
RBIE
Bit 3
39.06 kHz
15.5.3
The following steps should be taken when configuring
the CCP module for PWM operation:
1.
2.
3.
4.
5.
CCP1M2
CCP2M2
TMR0IF
CCP1IE
CCP1IP
CCP1IF
FFh
Bit 2
10
1
Set the PWM period by writing to the PR2 register.
Set the PWM duty cycle by writing to the CCPR1L
register and CCP1CON<5:4> bits.
Make the CCP1 pin an output by clearing the
TRISC<2> bit.
Set the TMR2 prescale value and enable Timer2
by writing to T2CON.
Configure the CCP1 module for PWM operation.
CCP1M1
CCP2M1
SETUP FOR PWM OPERATION
TMR2IE
TMR2IP
TMR2IF
INT0IF
156.25 kHz
Bit 1
3Fh
1
8
CCP1M0 --00 0000 --00 0000
CCP2M0 --00 0000 --00 0000
TMR1IF
TMR1IE -000 0000 -000 0000
TMR1IP -111 1111 -111 1111
RBIF
Bit 0
312.50 kHz
1Fh
0000 000x 0000 000u
-000 0000 -000 0000
1111 1111 1111 1111
0000 0000 0000 0000
1111 1111 1111 1111
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
1
7
Value on
POR,
BOR
DS39616B-page 157
416.67 kHz
Value on
all other
6.58
17h
Resets
1