PIC18F2431-I/SP Microchip Technology Inc., PIC18F2431-I/SP Datasheet - Page 201

• Manufacturer Part Number: PIC18F2431-I/SP
• Description: Microcontroller; 16 KB Flash; 768 RAM; 256 EEPROM; 24 I/O; 28-Pin-SPDIP
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F2431-I/SP

• A/d Inputs: 5-Channel, 10-Bit
• Cpu Speed: 10 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 24
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 16K Bytes
• Ram Size: 768 Bytes
• Speed: 40 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

17.7
In power inverter applications where the PWMs are
used in Complementary mode to control the upper and
lower switches of a half-bridge, a dead time insertion is
highly recommended. The dead time insertion keeps
both outputs in inactive state for a brief time. This
avoids any overlap in the switching during the state
change of the power devices due to T
characteristics.
Because the power output devices cannot switch
instantaneously, some amount of time must be pro-
vided between the turn-off event of one PWM output in
a complementary pair and the turn-on event of the
other transistor. The PWM module allows dead time to
be programmed. Following sections explain the dead
time block in detail.
FIGURE 17-17:
FIGURE 17-18:
 2003 Microchip Technology Inc.
Compare Input
Duty Cycle
Dead Time Generators
Dead Time
Dead Time
Select Bits
Prescale
F
OSC
DEAD TIME CONTROL UNIT BLOCK DIAGRAM FOR ONE PWM OUTPUT PAIR
DEAD TIME INSERTION FOR COMPLEMENTARY PWM
Clock Control
and Prescaler
compare
output
PWM1
PWM0
PDC1
ON
Dead Time Register
and T
PIC18F2331/2431/4331/4431
6-Bit Down Counter
Zero Compare
OFF
Preliminary
t d
17.7.1
Each complementary output pair for the PWM module
has a 6-bit down counter used to produce the dead
time insertion. As shown in Figure 17-17, each dead
time unit has a rising and falling edge detector con-
nected to the duty cycle comparison output. The dead
time is loaded into the timer on the detected PWM edge
event. Depending on whether the edge is rising or fall-
ing, one of the transitions on the complementary out-
puts is delayed until the timer counts down to zero. A
timing diagram indicating the dead time insertion for
one pair of PWM outputs is shown in Figure 17-18.
t d
DEAD TIME INSERTION
Odd PWM Signal To
Output Control Block
Even PWM Signal To
Output Control Block
DS39616B-page 199