PIC18F2431-I/SP Microchip Technology Inc., PIC18F2431-I/SP Datasheet - Page 189

• Manufacturer Part Number: PIC18F2431-I/SP
• Description: Microcontroller; 16 KB Flash; 768 RAM; 256 EEPROM; 24 I/O; 28-Pin-SPDIP
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F2431-I/SP

• A/d Inputs: 5-Channel, 10-Bit
• Cpu Speed: 10 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 24
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 16K Bytes
• Ram Size: 768 Bytes
• Speed: 40 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

REGISTER 17-3:
 2003 Microchip Technology Inc.
bit 7
bit 6-4
bit 3-0
PWMCON0: PWM CONTROL REGISTER 0
bit 7
Unimplemented: Read as ‘0’.
PWMEN2:PWMEN0: PWM Module Enable bits
111 =All odd PWM I/O pins enabled for PWM output
110 =PWM1, PWM3 pins enabled for PWM output.
101 =All PWM I/O pins enabled for PWM output
100 =PWM0, PWM1, PWM2, PWM3, PWM4 and PWM5 pins enabled for PWM output.
011 =PWM0, PWM1, PWM2 and PWM3 I/O pins enabled for PWM output.
010 =PWM0 and PWM1 pins enabled for PWM output.
001 =PWM1 pin is enabled for PWM output.
000 =PWM module disabled. All PWM I/O pins are general purpose I/O.
PMOD3:PMOD0: PWM Output Pair Mode bits
For PMOD0:
1 = PWM I/O pin pair (PWM0, PWM1) is in the Independent mode.
0 = PWM I/O pin pair (PWM0, PWM1) is in the Complementary mode.
For PMOD1:
1 = PWM I/O pin pair (PWM2, PWM3) is in the Independent mode.
0 = PWM I/O pin pair (PWM2, PWM3) is in the Complementary mode.
For PMOD2:
1 = PWM I/O pin pair (PWM4, PWM5) is in the Independent mode.
0 = PWM I/O pin pair (PWM4, PWM5) is in the Complementary mode.
For PMOD3
1 = PWM I/O pin pair (PWM6, PWM7) is in the Independent mode.
0 = PWM I/O pin pair (PWM6, PWM7) is in the Complementary mode.
Legend:
R = Readable bit
-n = Value at POR
Note 1: Reset condition of PWMEN bits depends on PWMPIN device configuration bit.
U-0
—
2: When PWMEN2:PWMEN0 = 101, PWM[5:0] outputs are enabled for
3: Unimplemented in PIC18F2X31 devices; maintain these bits clear.
PIC18F2X31 devices; PWM[7:0] outputs are enabled for PIC18F4X31devices.
When PWMEN2:PWMEN0 = 111, PWM outputs 1, 3 and 5 are enabled in
PIC18F2X31devices; PWM outputs 1, 3, 5 and 7 are enabled in PIC18F4X31
devices.
PWMEN2 PWMEN1 PWMEN0 PMOD3
(3)
R/W-1
:
(1)
PIC18F2331/2431/4331/4431
R/W-1
Preliminary
W = Writable bit
‘1’ = bit is set
(1)
R/W-1
(1)
(2)
(1)
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = bit is cleared
.
(2)
.
(3)
PMOD2
R/W-0
x = bit is unknown
PMOD1
R/W-0
DS39616B-page 187
PMOD0
R/W-0
bit 0