PIC18F2431-I/SP Microchip Technology Inc., PIC18F2431-I/SP Datasheet - Page 288

• Manufacturer Part Number: PIC18F2431-I/SP
• Description: Microcontroller; 16 KB Flash; 768 RAM; 256 EEPROM; 24 I/O; 28-Pin-SPDIP
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F2431-I/SP

• A/d Inputs: 5-Channel, 10-Bit
• Cpu Speed: 10 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 24
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 28-pin SPDIP
• Programmable Memory: 16K Bytes
• Ram Size: 768 Bytes
• Speed: 40 MHz
• Timers: 1-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC18F2331/2431/4331/4431
22.5.2
The entire data EEPROM is protected from external
reads and writes by two bits: CPD and WRTD. CPD
inhibits external reads and writes of data EEPROM.
WRTD inhibits external writes to data EEPROM. The
CPU can continue to read and write data EEPROM
regardless of the protection bit settings.
22.5.3
The configuration registers can be write-protected. The
WRTC bit controls protection of the configuration
registers. In normal Execution mode, the WRTC bit is
readable only. WRTC can only be written via ICSP or
an external programmer.
22.6
Eight memory locations (200000h-200007h) are
designated as ID locations, where the user can store
checksum or other code identification numbers. These
locations are both readable and writable during normal
execution through the TBLRD and TBLWT instructions,
or during program/verify. The ID locations can be read
when the device is code-protected.
22.7
PIC18F2331/2431/4331/4431 microcontrollers can be
serially programmed while in the end application circuit.
This is simply done with two lines for clock and data,
and three other lines for power, ground and the pro-
gramming voltage. This allows customers to manufac-
ture boards with unprogrammed devices, and then
program the microcontroller just before shipping the
product. This also allows the most recent firmware or a
custom firmware to be programmed.
22.8
When the DEBUG bit in configuration register
CONFIG4L is programmed to a ‘0’, the In-Circuit
Debugger functionality is enabled. This function allows
simple debugging functions when used with MPLAB
IDE. When the microcontroller has this feature
enabled, some resources are not available for general
use. Table 22-4 shows which resources are required by
the background debugger.
TABLE 22-4:
DS39616B-page 286
I/O pins:
Stack:
Program Memory:
Data Memory:
ID Locations
In-Circuit Debugger
In-Circuit Serial Programming
DATA EEPROM
CODE PROTECTION
CONFIGURATION REGISTER
PROTECTION
DEBUGGER RESOURCES
RB6, RB7
2 levels
512 bytes
10 bytes
Preliminary
®
To use the In-Circuit Debugger function of the micro-
controller, the design must implement In-Circuit Serial
Programming connections to MCLR/V
RB7 and RB6. This will interface to the In-Circuit
Debugger module available from Microchip or one of
the third party development tool companies.
22.9
The
(CONFIG4L<2>) enables Low-Voltage ICSP Program-
ming (LVP). When LVP is enabled, the microcontroller
can be programmed without requiring high voltage
being applied to the MCLR/V
pin is then dedicated to controlling Program mode entry
and is not available as a general purpose I/O pin.
LVP is enabled in erased devices.
While programming using LVP, V
MCLR/V
Programming mode, V
If Low-Voltage ICSP Programming mode will not be
used, the LVP bit can be cleared and RB5/PGM
becomes available as the digital I/O pin RB5. The LVP
bit may be set or cleared only when using standard high
voltage programming (V
pin). Once LVP has been disabled, only the standard
high voltage programming is available and must be
used to program the device.
Memory that is not code-protected can be erased using
either a block erase, or erased row by row, then written
at any specified V
erased, a block erase is required. If a block erase is to
be performed when using low-voltage programming,
the device must be supplied with V
Note 1: High voltage programming is always
LVP
PP
2: When
3: When LVP is enabled, externally pull the
Low-Voltage ICSP Programming
pin as in normal Execution mode. To enter
available, regardless of the state of the
LVP bit or the PGM pin, by applying V
to the MCLR pin.
enabled, the RB5 pin can no longer be
used as a general purpose I/O pin.
PGM pin to V
execution.
bit
DD
in
. If code-protected memory is to be
Low-Voltage
DD
 2003 Microchip Technology Inc.
Configuration
IHH
is applied to the PGM pin.
SS
applied to the MCLR/V
PP
to allow normal program
pin, but the RB5/PGM
DD
DD
Programming
is applied to the
of 4.5V to 5.5V.
PP
Register
, V
DD
, V
IHH
SS
4L
is
PP
,