SAF7849HL/M295,557 NXP Semiconductors, SAF7849HL/M295,557 Datasheet - Page 10

• Manufacturer Part Number: SAF7849HL/M295,557
• Description: IC AUD DECODER 144LQFP
• Manufacturer: NXP Semiconductors
• Type: Audio Decoderr

Specifications of SAF7849HL/M295,557

• Applications: Audio CD
• Voltage - Supply, Analog: 3 V ~ 3.6 V
• Voltage - Supply, Digital: 1.8V, 3.3V
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 935287932557

NXP Semiconductors
SAF784X_2
Product data sheet
Fig 3.
(1) if_auxin_sel = 0: D1 and D2 selected; if_auxin_sel = 1: AUX_L, AUX_R selected.
AUX_L, AUX_R,
if_gpio_sel = 0: GPIO0 and GPIO2 selected; if_gpio_sel = 1: GPIO1 and GPIO3 selected.
LF acquisition block diagram
GPIO1, GPIO3
GPIO0, GPIO2
D1, D2,
Relative gain mismatch is minimized by using carefully scaled circuitry in the
time-continuous parts of the signal path, and by time-sharing circuitry in the time-discrete
parts. A simplified block diagram of the LF acquisition path is shown in
The output of the OPU is converted to a current across the input resistor. The current
conveyor provides a low input impedance and a high output impedance and sets a virtual
earth at the end of the voltage-to-current converter to the same voltage as V
The level shifter acts as a summing node for the DC cancellation and produces a current
that is referenced to an internal bias voltage which is independent of V
The output current charges an integration capacitor C
V
to the input current which tries to discharge the capacitor.
The register LFADCGain defines the amount of feedback current and so sets the ADC
gain. A PDM waveform appears at the output of the ADC, and is passed through a
low-pass filter (in the digital domain). The average value at the output of the filter is in
proportion to the voltage between V
Input signals from the OPU, GPIO inputs and the AUX inputs are routed to eight ADCs
comprising six LF ADCs and two general purpose ADCs. ADCs LF1, LF2, GP1 and GP2
are shared by some of these inputs which are routed via an internal multiplexer. ADC LF1
is shared by input pairs D1, D2, and AUX_L, AUX_R via the multiplexer. ADCs LF3 to LF6
are dedicated to inputs D3, D4, R1 and R2 respectively. ADC GP2 is shared by input pairs
GPIO0, GPIO2, and GPIO1, GPIO3 via the multiplexer. The internal multiplexer is
controlled by register AuxandGPADCControl.
anti-alias filter
(only used on
DDA
GP inputs)
/ 2, the comparator switches and sends a feedback current that has opposite polarity
1
0
(1)
MUX
d, s, gp_bipolar_sel
register LFControl
GP1Offset; GP2Offset
V
ref
D1Offset; D2Offset
One chip CD audio device with integrated MP3/WMA decoder
Rev. 02 — 9 May 2008
conveyor
current
i
and V
DC compensation
DAC
internal reference 2
reference1
internal
level
shift
ref
.
V
V
DD
SS
register LFControl
comp_ref_sel[1:0]
compin
C int
int
. When the voltage reaches
feedback switch
GenPurpGain
LFADCGain
feedback
DAC
fsl (clock)
SAF784x
ref
Figure
© NXP B.V. 2008. All rights reserved.
.
001aag307
dx_pdm
ref
3.
(1.6 V).
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