SAF7849HL/M295,557 NXP Semiconductors, SAF7849HL/M295,557 Datasheet - Page 26

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SAF7849HL/M295,557

Manufacturer Part Number
SAF7849HL/M295,557
Description
IC AUD DECODER 144LQFP
Manufacturer
NXP Semiconductors
Type
Audio Decoderr
Datasheet

Specifications of SAF7849HL/M295,557

Applications
Audio CD
Voltage - Supply, Analog
3 V ~ 3.6 V
Voltage - Supply, Digital
1.8V, 3.3V
Mounting Type
Surface Mount
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935287932557

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SAF7849HL/M295,557
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
SAF784X_2
Product data sheet
correction range of
compensation (offset comp) value can be programmed via register OffsetComp, and will
be regulated in hardware as soon as the AOC is turned on.
The AOC will regulate the offset comp value such that the measured offset stays within a
window programmed by register OffsetBound. The offset comp value decreases if the
offset is above this window, and increases if the offset is below the window. If an inversion
occurs on the RF signal between analog and digital, the reaction of this loop can be
inverted by programming OffsetBound bit OFFSETINV.
The offset changes are not sent to the analog offset subtraction directly, but are integrated
over time. Only if, on average, an offset increase or decrease is requested, this will result
in a real offset increase or decrease of the analog addition. This can also be read back via
register OffsetComp. The AOC, together with the noise filter on the peak detector,
prevents RF noise causing over-sensitive offset regulation. To further reduce sensitive
behavior, a hysteresis window with a width of one offset step has been added between the
integrator and offset comp value. The bandwidth of the offset loop will determine how fast
it reacts to fingerprints and other defects; it is programmed via register OffsetIntegBW. It is
also possible to limit the range of the offset comp value by programming a maximum and
minimum boundary by register OffsetCompBoundHi and OffsetCompBoundLo.
AGC/AOC general and rules-of-thumb:
can be enabled or disabled separately via register AGCAOCControl. This register also
allows the use of a ‘slow’ AGC and/or AOC loop. In this case the programmed loop
bandwidth is decreased with an extra factor of 128. In this mode the loops will be too slow
to react to defects, but can be used for a slow software-like gain and/or offset regulation to
regulate the average gain and offset over the disc comfortably within a specified range.
An important feature is the AGCAOCControl bit DISHOLDNOLOCK, which disables
holding of the AGC and AOC loops during defects (triggered by the defect detector, see
Section “Defect detector” on page 26
permanent lockups of the loops caused by a small amplitude triggering the defect
detector, which in return would hold the AGC loop.
The following things should be taken into account as general ‘rules-of-thumb’:
The bandwidth of the loops should never be programmed to be too wide (‘fast’) with
respect to the peak detector measurement window, to avoid an unstable loop. If the
PDwindow = 2
2
Defect detector:
RF stream, and freezes some signal conditioning and bit recovery logic during these
defects. This prevents the control loops inside this logic drifting away from their optimal
point of operation when there is no RF present, so that they can recover very fast when
good RF is present again.
-(n+1)
The amplitude thresholds should not be programmed too close to each other: allow at
least two gain steps (1.6 dB) from lower to higher boundary and vice versa to avoid an
over-sensitive AGC.
The offset boundary should not be programmed too tight:
an over-sensitive AOC.
(Hz).
n
f
clk(sys)
The defect detector detects the presence of black or white dots in the
42 LSB steps (more than the whole ADC range). This offset
(Hz) wide, the bandwidth of the loops should never be higher than
One chip CD audio device with integrated MP3/WMA decoder
Rev. 02 — 9 May 2008
while the HF PLL is not in lock. This feature avoids
The AGC and AOC hardware regulation loops
8 is a good value to avoid
SAF784x
© NXP B.V. 2008. All rights reserved.
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