PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 157

• Manufacturer Part Number: PNX1500E
• Manufacturer: NXP Semiconductors

Specifications of PNX1500E

• Lead Free Status / Rohs Status: Not Compliant

NXP Semiconductors
Volume 1 of 1
Table 1: PNX15xx/952x Series Module and Bus Clocks
PNX15XX_PNX952X_SER_N_4
Product data sheet
Bus or
Module
GPIO
SPDIO
FGPI
FGPO
Signal Name
clk_gpio_4q
clk_gpio_5q
clk_gpio_6q_12 GPIO FIFO clock/
clk_gpio_13
clk_gpio_14
clk_spdo
clk_spdi
clk_fgpi
clk_fgpo
2.2 Clock Sources for PNX15xx/952x Series
Description
GPIO FIFO clock
GPIO FIFO clock
external clock
external clock
external clock
SPDO module
clock
SPDI module clock
All clocks in the PNX15xx/952x Series clock system are generated from 5 possible
sources:
•
•
•
•
•
2 identical PLLs within the CAB block
1 separate PLL for the memory system called PLL2
high frequency dividers from the 1.728 GHz PLL in the CAB
the DDS blocks within the CAB
external clock inputs, or derived from input data streams
Rev. 4.0 — 03 December 2007
Frequencies
up to 108 MHz
up to 108 MHz
up to 108 MHz
up to 108 MHz
up to 108 MHz
up to 40 MHz
up to 100 MHz
up to 100 MHz
• 72 MHz
• 144 MHz
MMIO Clock Module Control
Register(s)
DDS8_CTL
DDS7_CTL
DDS6_CTL
DDS5_CTL
DDS2_CTL
DDS5_CTL
CLK_SPDO_CTL
CLK_SPDI_CTL
CLK_FGPI_CTL
CLK_FGPO_CTL
• DDS3_CTL
• or DDS8_CTL
• PLL1_CTL and
• or DDS2_CTL
DDS1_CTL
PNX15xx/952x Series
Chapter 5: The Clock Module
Standard
Clock Source
DDS8
DDS6
-
DDS5
1.728 GHz DIVIDERS
DDS8
DDS2
© NXP B.V. 2007. All rights reserved.
5-157