PNX1500E NXP Semiconductors, PNX1500E Datasheet - Page 518

• Manufacturer Part Number: PNX1500E
• Manufacturer: NXP Semiconductors

Specifications of PNX1500E

• Lead Free Status / Rohs Status: Not Compliant

NXP Semiconductors
Volume 1 of 1
PNX15XX_PNX952X_SER_N_4
Product data sheet
2.9 Error Behavior
indicated for each operating mode. Note that for high sample rates with more than
four channels (96 kHz, 32-bit, >4ch), Audio Out cannot guarantee error-free operation
due to data bus latency restrictions.
Table 6: Audio Out Latency Tolerance Examples
In normal operation, the system controller and Audio Out hardware continuously
exchange buffers without ever failing to transmit a sample. If the system controller
fails to provide a new DMA buffer address in time, the UNDERRUN error flag is raised
and the last valid sample or sample pair is repeated until a new buffer of data is
assigned by an ACK1 or ACK2. The UNDERRUN flag is not affected by ACK1 or
ACK2; it can only be cleared by an explicit ACK_UDR.
Transfer Mode
2 ch stereo
16 bit/sample
4 ch stereo
16 bit/sample
6 ch stereo
16 bit/sample
8 ch stereo
16 bit/sample
2 ch stereo
32 bit/sample
4 ch stereo
32 bit/sample
6 ch stereo
32 bit/sample
8 ch stereo
32 bit/sample
2 ch stereo
16 bit/sample
4 ch stereo
16 bit/sample
6 ch stereo
16 bit/sample
8 ch stereo
16 bit/sample
2 ch stereo
32 bit/sample
4 ch stereo
32 bit/sample
*
2ch 16it stereo: (17 * T)2ch 32bit stereo:(9 * T)
4ch 16bit stereo:(9 * T)4ch 32bit stereo:(5 * T)
6ch 16bit stereo: (5 * T)6ch 32bit stereo:(3 * T)
8ch 16bit stereo:(5 * T)8ch 32bit stereo:(3 * T)
Max Latency (uSec) (with T=1/Fs)
Rev. 4.0 — 03 December 2007
Fs (kHz)
48.0
48.0
48.0
48.0
48.0
48.0
48.0
48.0
96.0
96.0
96.0
96.0
96.0
96.0
T (nSec)
20833
20833
20833
20833
20833
20833
20833
20833
10417
10417
10417
10417
10417
10417
PNX15xx/952x Series
*
(with T=1/Fs)
354.17
187.50
104.17
104.17
187.50
104.17
62.50
62.50
177.08
93.75
52.08
52.08
93.75
52.08
Max Latency (uSec)
Chapter 15: Audio Output
© NXP B.V. 2007. All rights reserved.
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