MC9S12C128VFU Freescale Semiconductor, MC9S12C128VFU Datasheet - Page 419

• Manufacturer Part Number: MC9S12C128VFU
• Manufacturer: Freescale Semiconductor

Specifications of MC9S12C128VFU

• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 25MHz
• Interface Type: CAN/SCI/SPI
• Program Memory Type: Flash
• Program Memory Size: 128KB
• Total Internal Ram Size: 4KB
• # I/os (max): 60
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/2.97V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

14.3.2.3
Read: anytime
Write: anytime; writes to the reserved bits have no effect
The baud rate divisor equation is as follows:
The baud rate can be calculated with the following equation:
Freescale Semiconductor
Module Base 0x0002
SPPR[2:0]
SPR[2:0}
Reset
Field
6:4
2:0
W
R
Bidirectional
Pin Mode
SPI Baud Rate Preselection Bits — These bits specify the SPI baud rates as shown in
mode, a change of these bits will abort a transmission in progress and force the SPI system into idle state.
SPI Baud Rate Selection Bits — These bits specify the SPI baud rates as shown in
a change of these bits will abort a transmission in progress and force the SPI system into idle state.
SPI Baud Rate Register (SPIBR)
0
0
7
= Unimplemented or Reserved
SPPR2
Table 14-5. Bidirectional Pin Configurations (continued)
0
6
SPC0
1
Figure 14-5. SPI Baud Rate Register (SPIBR)
BaudRateDivisor
Table 14-6. SPIBR Field Descriptions
Baud Rate
SPPR1
MC9S12C-Family / MC9S12GC-Family
BIDIROE
0
5
0
1
=
BusClock BaudRateDivisor
SPPR0
Rev 01.24
=
0
4
(
SPPR
Description
Chapter 14 Serial Peripheral Interface (SPIV3) Block Description
⁄
Slave I/O
Slave In
MISO
+
1
) 2
0
0
3
•
(
SPR
+
1
SPR2
)
0
2
MOSI not used by SPI
Table
MOSI
SPR1
Table
14-7. In master mode,
0
1
14-7. In master
SPR0
0
0
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