HD6417709SF100B Renesas Electronics America, HD6417709SF100B Datasheet - Page 113

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HD6417709SF100B

Manufacturer Part Number
HD6417709SF100B
Description
MCU 32-Bit SuperH RISC ROMLess 1.7V/3.3V 208-Pin LQFP
Manufacturer
Renesas Electronics America
Datasheet

Specifications of HD6417709SF100B

Package
208LQFP
Family Name
SuperH
Maximum Speed
100 MHz
Operating Supply Voltage
1.7|3.3 V
Data Bus Width
32 Bit
Program Memory Type
ROMLess
Number Of Programmable I/os
96
Interface Type
IrDA/SCI/SCIF/UDI
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Operating Temperature
-20 to 75 °C
Number Of Timers
3

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The sharing information (SH) determines whether the PTEH.ASID and the ASID in the TLB entry
are compared. ASIDs are compared when there is no sharing between processes (SH
when there is sharing (SH
When single virtual memory is supported (MMUCR.SV
(SR.MD
when single virtual memory is supported and privileged mode is engaged. The objects of address
comparison are shown in figure 3.8.
MMUCR.SV = 1)?
1), all process resources can be accessed. This means that ASIDs are not compared
(SR.MD = 1 and
Bits compared:
VPN (31 17)
VPN (11 10)
SH = 1 or
SZ = 0?
Yes
Yes (1 kbyte)
Figure 3.8 Objects of Address Comparison
1).
No (4 kbytes)
Bits compared:
VPN (31 17)
No
Bits compared:
VPN (31 17)
VPN (11 10)
ASID (7 0)
1) and privileged mode is engaged
SZ = 0?
Yes (1 kbyte)
Rev. 5.00, 09/03, page 67 of 760
No (4 kbytes)
Bits compared:
VPN (31 17)
ASID (7 0)
0) but not

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