HD6417709SF100B Renesas Electronics America, HD6417709SF100B Datasheet - Page 510

• Manufacturer Part Number: HD6417709SF100B
• Description: MCU 32-Bit SuperH RISC ROMLess 1.7V/3.3V 208-Pin LQFP
• Manufacturer: Renesas Electronics America

Specifications of HD6417709SF100B

• Package: 208LQFP
• Family Name: SuperH
• Maximum Speed: 100 MHz
• Operating Supply Voltage: 1.7|3.3 V
• Data Bus Width: 32 Bit
• Program Memory Type: ROMLess
• Number Of Programmable I/os: 96
• Interface Type: IrDA/SCI/SCIF/UDI
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Operating Temperature: -20 to 75 °C
• Number Of Timers: 3

In receiving, the SCI operates as follows:
1. The SCI monitors the communication line. When it detects a start bit (0), the SCI synchronizes
2. Receive data is shifted into SCRSR in order from the LSB to the MSB.
3. The parity bit and stop bit are received. After receiving these bits, the SCI makes the following
Note: When a receive error flag is set, further receiving is disabled. The RDRF bit is not set to 1.
4. After setting RDRF to 1, if the receive-data-full interrupt enable bit (RIE) is set to 1 in
Table 14.12 Receive Error Conditions and SCI Operation
Receive Error
Overrun error
Framing error
Parity error
Rev. 5.00, 09/03, page 464 of 760
internally and starts receiving.
checks:
a. Parity check: The number of 1s in the receive data must match the even or odd parity
b. Stop bit check: The stop bit value must be 1. If there are two stop bits, only the first stop bit
c. Status check: RDRF must be 0 so that receive data can be loaded from SCRSR into
SCSCR, the SCI requests a receive-data-full interrupt (RXI). If one of the error flags (ORER,
PER, or FER) is set to 1 and the receive-data-full interrupt enable bit (RIE) in SCSCR is also
set to 1, the SCI requests a receive-error interrupt (ERI).
setting of the O/E bit in SCSMR.
is checked.
SCRDR.
If these checks all pass, the SCI sets RDRF to 1 and stores the received data in SCRDR. If
one of the checks fails (receive error), the SCI operates as indicated in table 14.12.
Be sure to clear the error flags.
Abbreviation
FER
PER
ORER
Condition
RDRF is still set to 1 in SCSSR
Stop bit is 0
even/odd parity setting in SCSMR
Receiving of next data ends while
Parity of receive data differs from
Receive data not
transferred from SCRSR
into SCRDR
Receive data transferred
from SCRSR into SCRDR
Receive data transferred
from SCRSR into SCRDR
Data Transfer