HD6417709SF100B Renesas Electronics America, HD6417709SF100B Datasheet - Page 424

• Manufacturer Part Number: HD6417709SF100B
• Description: MCU 32-Bit SuperH RISC ROMLess 1.7V/3.3V 208-Pin LQFP
• Manufacturer: Renesas Electronics America

Specifications of HD6417709SF100B

• Package: 208LQFP
• Family Name: SuperH
• Maximum Speed: 100 MHz
• Operating Supply Voltage: 1.7|3.3 V
• Data Bus Width: 32 Bit
• Program Memory Type: ROMLess
• Number Of Programmable I/os: 96
• Interface Type: IrDA/SCI/SCIF/UDI
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Operating Temperature: -20 to 75 °C
• Number Of Timers: 3

Bit 0—Count Start 0 (STR0): Selects whether to operate or halt CMCNT0.
Bit 0: STR0
0
1
Compare Match Timer Control/Status Register 0 (CMCSR0)
The compare match timer control/status register 0 (CMCSR0) is a 16-bit register that indicates the
occurrence of compare matches, sets the enable/disable status of interrupts, and establishes the
clock used for incrementation. It is initialized to H'0000 by a reset, but retains its previous value in
standby mode.
Note: * The only value that can be written is 0 to clear the flag.
Bits 15 to 8 and 5 to 2—Reserved: These bits are always read as 0. The write value should
always be 0.
Bit 7—Compare Match Flag (CMF): Indicates whether or not the compare match timer counter
0 (CMCNT0) and compare match timer constant 0 (CMCOR0) values match.
Bit 7: CMF
0
1
Rev. 5.00, 09/03, page 378 of 760
Initial value:
Initial value:
R/W:
R/W:
Bit:
Bit:
R/(W) *
CMF
15
—
R
0
7
0
Description
CMCNT0 count operation halted
CMCNT0 count operation
Description
CMCNT0 and CMCOR0 values do not match
Clearing condition: Write 0 to CMF after reading CMF = 1
CMCNT0 and CMCOR0 values match
R/W
14
—
—
R
0
6
0
13
—
—
R
R
0
5
0
12
—
—
R
R
0
4
0
11
—
—
R
R
0
3
0
10
—
—
R
R
0
2
0
CKS1
R/W
—
R
9
0
1
0
(Initial value)
(Initial value)
CKS0
R/W
—
R
8
0
0
0