HD6417709SF100B Renesas Electronics America, HD6417709SF100B Datasheet - Page 288

• Manufacturer Part Number: HD6417709SF100B
• Description: MCU 32-Bit SuperH RISC ROMLess 1.7V/3.3V 208-Pin LQFP
• Manufacturer: Renesas Electronics America

Specifications of HD6417709SF100B

• Package: 208LQFP
• Family Name: SuperH
• Maximum Speed: 100 MHz
• Operating Supply Voltage: 1.7|3.3 V
• Data Bus Width: 32 Bit
• Program Memory Type: ROMLess
• Number Of Programmable I/os: 96
• Interface Type: IrDA/SCI/SCIF/UDI
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Operating Temperature: -20 to 75 °C
• Number Of Timers: 3

Bits 15 to 13—Area 6 Wait Control (A6W2, A6W1, A6W0): Specify the number of wait states
inserted in physical space area 6. Also specify the number of states for burst transfer.
Bit 15:
A6W2
0
1
Bits 12 to 10—Area 5 Wait Control (A5W2, A5W1, A5W0): Specify the number of wait states
inserted in physical space area 5. Also specify the number of states for burst transfer.
Bit 12:
A5W2
0
1
Rev. 5.00, 09/03, page 242 of 760
Bit 14:
A6W1
0
1
0
1
Bit 11:
A5W1
0
1
0
1
Bit 13:
A6W0
0
1
0
1
0
1
0
1
Bit 10:
A5W0
0
1
0
1
0
1
0
1
Inserted
Wait States
0
1
2
3
4
6
8
10
(Initial value)
Inserted
Wait States
0
1
2
3
4
6
8
10
(Initial value)
First Cycle
First Cycle
W W W W A A A A I I I I T T T T Pin
Disabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
W W W W A A A A I I I I T T T T Pin
Disabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Description
Description
Number of States
Per Data Transfer
2
2
3
4
4
6
8
10
Number of States
Per Data Transfer
2
2
3
4
4
6
8
10
(Excluding First Cycle)
(Excluding First Cycle)
Burst Cycle
Burst Cycle
W W W W A A A A I I I I T T T T Pin
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
W W W W A A A A I I I I T T T T Pin
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled
Enabled