HD6417709SF100B Renesas Electronics America, HD6417709SF100B Datasheet - Page 782

• Manufacturer Part Number: HD6417709SF100B
• Description: MCU 32-Bit SuperH RISC ROMLess 1.7V/3.3V 208-Pin LQFP
• Manufacturer: Renesas Electronics America

Specifications of HD6417709SF100B

• Package: 208LQFP
• Family Name: SuperH
• Maximum Speed: 100 MHz
• Operating Supply Voltage: 1.7|3.3 V
• Data Bus Width: 32 Bit
• Program Memory Type: ROMLess
• Number Of Programmable I/os: 96
• Interface Type: IrDA/SCI/SCIF/UDI
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Operating Temperature: -20 to 75 °C
• Number Of Timers: 3

CS6 to CS2, CS0
RD
RD/WR
BS
RAS3U/PTE[2]
RAS3L/PTJ[0]
CASL/PTJ[2]
CASU/PTJ[3]
WE0/DQMLL
WE1/DQMLU/WE
WE2/DQMUL/
ICIORD/PTK[6]
WE3/DQMUU/
ICIOWR/PTK[7]
CE2A/PTE[4]
CE2B/PTE[5]
CKE/PTK[5]
WAIT
IOIS16/PTG[7]
A25 to A0
D7 to D0
D15 to D8
D31 to D16
Notes: 1. Disabled when WCR2 register wait setting is 0.
Rev. 5.00, 09/03, page 736 of 760
2. Unused data pins should be switched to the port function, or pulled up.
Pin
W High
W Low
W High
W Low
W High
W High
R Low
R High
R High
R High
R High
R High
Disabled Disabled Disabled Disabled Disabled Disabled Enabled
Enabled
Enabled
High
High
High
High
High
High
Disabled Disabled Disabled Disabled Disabled Disabled Disabled Disabled
Enabled
Address
Valid
data
High-Z
High-Z
Access
Width
Word/
Long-
Byte/
word
8-Bit
PCMCIA Memory Interface (Area 6)
Bus
* 2
* 2
* 1
Enabled
Low
High
High
Low
Enabled
High
High
High
High
High
High
High
Low
High
High
High
High
High
High
Enabled
Address
Valid
data
Invalid
data
High-Z
Access
dress
Byte
(Ad-
2n)
* 2
16-Bit Bus Width
* 1
High
Low
High
High
Low
Enabled
High
High
High
High
High
High
High
Low
High
High
High
High
High
Low
Enabled
Address
Invalid
data
Valid
data
High-Z
Access
2n + 1)
dress
Byte
(Ad-
* 2
* 1
Enabled
Low
High
High
Low
Enabled
High
High
High
High
High
High
High
Low
High
High
High
High
High
Low
Enabled
Address
Valid
data
Valid
data
High-Z
Access
Word/
Long-
word
* 2
* 1
Enabled
High
High
High
Low
Enabled
High
High
High
High
High
High
High
High
Low
High
High
Low
High
High
Enabled
Address
Valid
data
High-Z
High-Z
Access
Word/
Width
Long-
Byte/
word
8-Bit
Bus
PCMCIA/IO Interface (Area 6)
* 2
* 2
* 1
Enabled
High
High
High
Low
Enabled
High
High
High
High
High
High
High
High
Low
High
High
Low
High
High
Enabled
Address
Valid
data
Invalid
data
High-Z
Access
dress
Byte
(Ad-
2n)
* 2
16-Bit Bus Width
* 1
High
High
High
High
Low
Enabled
High
High
High
High
High
High
High
High
Low
High
High
Low
High
Low
Enabled
Address
Invalid
data
Valid
data
High-Z
Access
dress
2n+1)
Byte
(Ad-
* 2
* 1
Enabled
High
High
High
Low
Enabled
High
High
High
High
High
High
High
High
Low
High
High
Low
High
Low
Enabled
Enabled
Address
Valid
data
Valid
data
High-Z
Access
Word/
Long-
word
* 2
* 1