HD6417709SF100B Renesas Electronics America, HD6417709SF100B Datasheet - Page 473

• Manufacturer Part Number: HD6417709SF100B
• Description: MCU 32-Bit SuperH RISC ROMLess 1.7V/3.3V 208-Pin LQFP
• Manufacturer: Renesas Electronics America

Specifications of HD6417709SF100B

• Package: 208LQFP
• Family Name: SuperH
• Maximum Speed: 100 MHz
• Operating Supply Voltage: 1.7|3.3 V
• Data Bus Width: 32 Bit
• Program Memory Type: ROMLess
• Number Of Programmable I/os: 96
• Interface Type: IrDA/SCI/SCIF/UDI
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Operating Temperature: -20 to 75 °C
• Number Of Timers: 3

14.1
The SH7709S has an on-chip serial communication interface (SCI) that supports both
asynchronous and clock synchronous serial communication. It also has a multiprocessor
communication function for serial communication among two or more processors. The SCI
supports a smart card interface, which is a serial communication feature for IC card interfaces that
conforms to the ISO/IEC standard 7816-3 for identification cards. See section 15, Smart Card
Interface, for more information.
14.1.1
Selection of asynchronous or synchronous as the serial communication mode.
Asynchronous mode:
Synchronous mode:
Full duplex communication: The transmitting and receiving sections are independent, so the
SCI can transmit and receive simultaneously. Both sections use double buffering, so
continuous data transfer is possible in both the transmit and receive directions.
On-chip baud rate generator with selectable bit rates
Serial data communication is synchronized by start-stop in character units. The SCI can
communicate with a universal asynchronous receiver/transmitter (UART), an asynchronous
communication interface adapter (ACIA), or any other communications chip that employs
a standard asynchronous serial system. It can also communicate with two or more other
processors using the multiprocessor communication function. There are 12 selectable serial
data communication formats.
Data length: 7 or 8 bits
Stop bit length: 1 or 2 bits
Parity: Even, odd, or none
Multiprocessor bit: 1 or 0
Receive error detection: Parity, overrun, and framing errors
Break detection: By reading the RxD level directly from the SC port data register (SCPDR)
when a framing error occurs
Serial data communication is synchronized with a clock signal. The SCI can communicate
with other chips having a synchronous communication function. There is one serial data
communication format.
Data length: 8 bits
Receive error detection: Overrun errors
Section 14 Serial Communication Interface (SCI)
Overview
Features
Rev. 5.00, 09/03, page 427 of 760