HD6417709SF100B Renesas Electronics America, HD6417709SF100B Datasheet - Page 699

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HD6417709SF100B

Manufacturer Part Number
HD6417709SF100B
Description
MCU 32-Bit SuperH RISC ROMLess 1.7V/3.3V 208-Pin LQFP
Manufacturer
Renesas Electronics America
Datasheet

Specifications of HD6417709SF100B

Package
208LQFP
Family Name
SuperH
Maximum Speed
100 MHz
Operating Supply Voltage
1.7|3.3 V
Data Bus Width
32 Bit
Program Memory Type
ROMLess
Number Of Programmable I/os
96
Interface Type
IrDA/SCI/SCIF/UDI
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Operating Temperature
-20 to 75 °C
Number Of Timers
3

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22.4.3
An UDI reset is executed by setting an UDI reset assert command in SDIR. An UDI reset is of the
same kind as a power-on reset. An UDI reset is released by inputting an UDI reset negate
command.
22.4.4
The UDI interrupt function generates an interrupt by setting a command from the UDI in the
SDIR. An UDI interrupt is a general exception/interrupt operation, resulting in a branch to an
address based on the VBR value plus offset, and with return by the RTE instruction. This interrupt
request has a fixed priority level of 15.
UDI interrupts are not accepted in sleep mode or standby mode.
22.4.5
The JTAG-based bypass mode for the UDI pins can be selected by setting a command from the
UDI in SDIR.
22.4.6
It is possible to recover from sleep mode by setting a command (0001) from the UDI in SDIR.
Chip internal reset
CPU state
UDI Reset
UDI Interrupt
Bypass
Using UDI to Recover from Sleep Mode
SDIR
UDI reset assert
Figure 22.3 UDI Reset
UDI reset negate
Rev. 5.00, 09/03, page 653 of 760
Branch to H'A0000000

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