HD6417709SF100B Renesas Electronics America, HD6417709SF100B Datasheet - Page 394

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HD6417709SF100B

Manufacturer Part Number
HD6417709SF100B
Description
MCU 32-Bit SuperH RISC ROMLess 1.7V/3.3V 208-Pin LQFP
Manufacturer
Renesas Electronics America
Datasheet

Specifications of HD6417709SF100B

Package
208LQFP
Family Name
SuperH
Maximum Speed
100 MHz
Operating Supply Voltage
1.7|3.3 V
Data Bus Width
32 Bit
Program Memory Type
ROMLess
Number Of Programmable I/os
96
Interface Type
IrDA/SCI/SCIF/UDI
On-chip Adc
8-chx10-bit
On-chip Dac
2-chx8-bit
Operating Temperature
-20 to 75 °C
Number Of Timers
3

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request signal. The source of the transfer request does not have to be the data transfer source or
destination. When RXI is set as the transfer request, however, the transfer source must be the SCI's
receive data register (RDR). Likewise, when TXI is set as the transfer request, the transfer source
must be the SCI's transmit data register (TDR). If the transfer requester is the A/D converter, the
data transfer source must be the A/D data register (ADDR).
Table 11.4 Selecting On-Chip Peripheral Module Request Modes with RS3-0 Bits
RS3 RS2 RS1 RS0
1
1
1
1
1
1
ADDR: A/D data register of A/D converter
Note: * External memory, memory-mapped external device, on-chip peripheral module (This
When outputting transfer requests from on-chip peripheral modules, the appropriate interrupt
enable bits must be set to output the interrupt signals.
If the interrupt request signal of the on-chip peripheral module is used as a DMA transfer request
signal, an interrupt is not sent to the CPU.
The DMA transfer request signals in table 11.4 are automatically discontinued when the
corresponding DMA transfer is performed. If cycle-steal mode is being employed, they are
withdrawn at the first transfer; if burst mode is being used, they are discontinued at the last
transfer.
Rev. 5.00, 09/03, page 348 of 760
0
0
1
1
1
1
applies only to IrDA, SCIF, A/D converter, D/A converter, and I/O ports.)
1
1
0
0
1
1
0
1
0
1
0
1
DMA
Transfer
Request
Source
IrDA
transmitter
IrDA
receiver
SCIF
transmitter
SCIF
receiver
A/D
converter
CMT
DMA Transfer Request Signal Source
TXI1 (IrDA transmit-data-empty
interrupt transfer request)
RXI1 (IrDA receive-data-full
interrupt transfer request)
TXI2 (SCIF transmit-data-empty
interrupt transfer request)
RXI2 (SCIF receive-data-full
interrupt transfer request)
ADI (A/D conversion end
interrupt)
CMI (Compare match timer
interrupt)
Any *
RDR1
Any *
RDR1
ADDR
Any *
Desti-
nation Bus Mode
TDR1
Any *
TDR2
Any *
Any *
Any *
Cycle-steal
Cycle-steal
Cycle-steal
Cycle-steal
Cycle-steal
Burst/
cycle-steal

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