STM32F103ZC

Manufacturer Part NumberSTM32F103ZC
DescriptionMainstream Performance line, ARM Cortex-M3 MCU with 256 Kbytes Flash, 72 MHz CPU, motor control, USB and CAN
ManufacturerSTMicroelectronics
STM32F103ZC datasheet
 

Specifications of STM32F103ZC

CoreARM 32-bit Cortex™-M3 CPUConversion Range0 to 3.6 V
Dma12-channel DMA controllerSupported Peripheralstimers, ADCs, DAC, SDIO, I2Ss, SPIs, I2Cs and USARTs
Systick Timera 24-bit downcounter  
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Page 82/130

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Electrical characteristics
Figure 41. NAND controller waveforms for common memory write access
FSMC_NCEx
ALE (FSMC_A17)
CLE (FSMC_A16)
FSMC_NWE
FSMC_NOE
FSMC_D[15:0]
Table 40.
Switching characteristics for NAND Flash read and write cycles
Symbol
(2)
t
FSMC_D[15:0] valid before FSMC_NWE high
d(D-NWE)
(2)
t
FSMC_NOE low width
w(NOE)
FSMC_D[15:0] valid data before FSMC_NOE
(2)
t
su(D-NOE)
high
(2)
t
FSMC_D[15:0] valid data after FSMC_NOE high 7
h(NOE-D)
(2)
t
FSMC_NWE low width
w(NWE)
(2)
t
FSMC_NWE low to FSMC_D[15:0] valid
v(NWE-D)
(2)
t
FSMC_NWE high to FSMC_D[15:0] invalid
h(NWE-D)
(3)
t
FSMC_ALE valid before FSMC_NWE low
d(ALE-NWE)
(3)
t
FSMC_NWE high to FSMC_ALE invalid
h(NWE-ALE)
(3)
t
FSMC_ALE valid before FSMC_NOE low
d(ALE-NOE)
(3)
t
FSMC_NWE high to FSMC_ALE invalid
h(NOE-ALE)
1. C
= 15 pF.
L
2. Based on characterization, not tested in production.
3. Guaranteed by design, not tested in production.
82/130
STM32F103xC, STM32F103xD, STM32F103xE
Low
t
t
d(ALE-NWE)
w(NWE)
t
v(NWE-D)
Parameter
Doc ID 14611 Rev 8
t
d(D-NWE)
t
h(NWE-D)
Min
Max
5t
+ 12
HCLK
4t
– 1.5 4t
+ 1.5
HCLK
HCLK
25
4t
– 1
4t
+ 2.5
HCLK
HCLK
0
2t
+ 4ns
HCLK
3t
+ 1.5
HCLK
3t
+ 4.5
HCLK
3t
+ 2
HCLK
3t
+ 4.5
HCLK
t
h(NWE-ALE)
ai14913b
(1)
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns