peb20560 Infineon Technologies Corporation, peb20560 Datasheet - Page 142

• Manufacturer Part Number: peb20560
• Description: Dsp Oriented Pbx Controller Doc
• Manufacturer: Infineon Technologies Corporation

Semiconductor Group
Figure 2-42 Block Structure of Circular Buffer (PEDIU RAM) in Different PEDIU
AMUL - bit 3 in UCR
AMUL bit defines whether PEDIU applies a-low to linear conversion on the input stream
and linear to a-low conversion on the output stream, or µ-low to linear conversion on the
input stream and linear to µ-low conversion on the output stream.
AMUL = 0: a-low conversion.
AMUL = 1: µ-low conversion.
Note: a/µ-low to linear conversion and linear to a/µ-low conversion can be bypassed by
ACTIVEP - bit 4 in UCR
ACTIVEP bit defines whether or not the PEDIU is in idle mode. When in idle mode the
PEDIU is paralyzed, and no activities may take place inside it − including DMA accesses
to the PEDIU RAM.
ACTIVEP = 0: PEDIU is in idle mode.
ACTIVEP = 1: PEDIU is active.
Note: When the PEDIU is in idle mode (ACTIVEP = 0), access of the DSP to the PEDIU
programming registers UBPIR and UBPOR. For details see section 2.8.2.3.
RAM is enabled.
Work Modes
DF
BF
C0
A0
E0
FF
1F
3F
5F
7F
9F
00
20
40
60
80
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
PEDIU Work Modes 0, 1 and 2
DSP - OUT0 - 0
DSP - OUT1 - 0
DSP - OUT0 - 1
DSP - OUT1 - 1
DSP - IN0 - 0
DSP - IN1 - 0
DSP - IN0 - 1
DSP - IN1 - 1
PEDIU-RAM
2-96
BF
C0
FF
3F
7F
00
40
80
H
H
H
H
H
H
H
H
PEDIU Work Modes 3 and 4
DSP - OUT0 - 0
DSP - OUT0 - 1
Functional Block Description
DSP - IN0 - 0
DSP - IN0 - 1
PEDIU-RAM
ITD10096
PEB 20560
2003-08