peb20560 Infineon Technologies Corporation, peb20560 Datasheet - Page 389

• Manufacturer Part Number: peb20560
• Description: Dsp Oriented Pbx Controller Doc
• Manufacturer: Infineon Technologies Corporation

Semiconductor Group
Table 7-19 DRDY Timing
Parameter
DRDY setup prior to DCL
rising edge
DRDY hold time after DCL
rising edge
DRDY setup prior to DCL
rising edge
DRDY hold time after DCL
rising edge
Figure 7-19 DRDY Timing
7.9.3
Table 7-20 Serial Interface Timing
Parameter
When SACCO-B0/1 HDC is Driven by an Externally Generated Clock
Receive data set-up
Receive data hold
Collision data set-up
3) CHI signal width is 8 DCL cycles when it is operated in a single clock mode
DCL
DRDY
(VMODR:MOD[1:0] =00, 01, 10), and 16 DCL cycles when it is operated in a
double clock mode (VMODR:MOD[1:0] =11). For more detailes see Table 7-
13, Table 7-14, Table 7-15 and Table 7-16.
Serial Interface Timing
t
DRDYH
Symbol
t
t
t
Symbol
t
t
t
t
RDS
RDH
CDS
DRDYS
DRDYH
DRDYS
DRDYH
t
DRDYS
min.
24
22
9
min.
TBD
TBD
TBD
TBD
Limit Values Unit Notes
Limit Values Unit
7-28
max.
max.
t
DRDYH
ns
ns
ns
ns
ns
ns
ns
Electrical Characteristics
When DCL is an output
When DCL is an input
Notes
t
DRDYS
ITT10133
1)
PEB 20560
2003-08