peb20560 Infineon Technologies Corporation, peb20560 Datasheet - Page 47

• Manufacturer Part Number: peb20560
• Description: Dsp Oriented Pbx Controller Doc
• Manufacturer: Infineon Technologies Corporation

2
DOC Block Diagram and System Integration see Figure 1-3.
2.1
2.1.1
The ELIC integrates the existing Siemens device PEB 2055 (EPIC-1), a two channel
HDLC-Controller (SACCO: Special Application Communication Controller) with a
PEB 2050 (PBC) compatible auto-mode, a D-channel arbiter, a configurable bus
interface and typical system glue logic into one chip. It covers all control functions on
digital and analog line cards and can be combined via IOM-2 interface with layer-1
circuits or special application devices (e.g. ADPCM/PCM-converters).
2.1.2
2.1.2.1
To allow recovery from software or hardware failure, a watchdog timer is provided.
After reset the watchdog timer is disabled. When setting bit SWT in the watchdog timer
control register WTC it is enabled. The only possibility to disable the watchdog timer is
a ELIC-reset (power-up or DRESET).The timer period is 1024 PFS-cycles assuming that
also PDC is active, i.e. a PFS of 8-kHz results in a timer period of 128 ms.
During that period, the bits WTC1 and WTC2 in the register WTC have to be written in
the following sequence:
Table 2-1 Watchdog Timer Programming
Activity
1.
2.
The minimum required interval between the two write accesses is 2 PDC-periods.
When the software fails to follow these requirements, a timer overflow occurs and a
IWD-interrupt is generated. Additionally an external reset indication (RESIN) is
activated. The internal ELIC-status is not changed.
Semiconductor Group
Functional Block Description
ELIC0 and ELIC1
General Functions and Device Architecture
Functional Blocks
Watchdog Timer
WTC:WTC1
1
0
2-1
Functional Block Description
0
1
WTC:WTC2
PEB 20560
2003-08