peb20560 Infineon Technologies Corporation, peb20560 Datasheet - Page 336

• Manufacturer Part Number: peb20560
• Description: Dsp Oriented Pbx Controller Doc
• Manufacturer: Infineon Technologies Corporation

When writing register MASK_A/B while ISTA_A/B indicates a non masked interrupt the
INT-pin is temporarily set into the inactive state. In this case the interrupt remains
indicated in the ISTA_A/B until these registers are read.
5.1.2.5
Access: read
Reset value: 00
XMR
XDU/EXE Transmission Data Underrun/Extended transmission End.
Note: It is not possible to transmit frames when a XMR- or XDU-interrupt is indicated.
EHC
RFO
RFS
Semiconductor Group
bit 7
XMR
Extended Interrupt Register (EXIR_A/B)
XDU/EXE
Transmit Message Repeat.
The transmission of a frame has to be repeated because:
– A frame consisting of more then 32 bytes is polled a second time in
– Collision has occurred after sending the 32nd data byte of a message in
– CTS (transmission enable) has been withdrawn after sending the 32nd
The actual frame has been aborted with IDLE, because the XFIFO holds no
further data, but the frame is not yet complete according to registers
XBCH/XBCL.
In extended transparent mode, this bit indicates the transmission end
condition.
Extended HDLC-frame.
The SACCO has received a frame in auto-mode which is neither a RR- nor
an I-frame. The control byte is stored temporarily in the RHCR-register but
not in the RFIFO.
Receive Frame Overflow.
A frame could not be stored due to the occupied RFIFO (i.e. whole frame has
been lost). This interrupt can be used for statistical purposes and indicates,
that the CPU does not respond quickly enough to an incoming RPF- or RME-
interrupt.
Receive Frame Start.
This is an early receiver interrupt activated after the start of a valid frame has
been detected, i.e. after a valid address check in operation modes providing
address recognition, otherwise after the opening flag (transparent mode 0),
delayed by two bytes.
auto-mode.
a bus configuration.
data byte of a message in point-to-point configuration.
H
EHC
RFO
5-93
0
RFS
Description of Registers
0
PEB 20560
bit 0
2003-08
0