S9S12G64F0MLF Freescale Semiconductor, S9S12G64F0MLF Datasheet - Page 208

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S9S12G64F0MLF

Manufacturer Part Number
S9S12G64F0MLF
Description
16-bit Microcontrollers - MCU S12 Core,64kFlash,Au
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S9S12G64F0MLF

Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
64 KB
Data Ram Size
2 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-48
Mounting Style
SMD/SMT

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1
1
Port Integration Module (S12GPIMV1)
2.4.3.9
2.4.3.10
210
Address 0x0008
Address 0x0009
Read: Anytime. The data source is depending on the data direction value.
Write: Anytime
Read: Anytime
Write: Anytime
DDRD
Field
Field
Reset
Reset
7-0
1-0
PE
W
W
R
R
Port D Data Direction—
This bit determines whether the associated pin is an input or output.
1 Associated pin configured as output
0 Associated pin configured as input
Port E general-purpose input/output data—Data Register
When not used with an alternative signal, this pin can be used as general-purpose I/O.
In general-purpose output mode the port data register bit is driven to the pin.
If the associated data direction bit of this pin is set to 1, a read returns the value of the port register, otherwise the
buffered pin input state is read.
Port E Data Register (PORTE)
0
0
Port E Data Direction Register (DDRE)
0
0
7
7
0
0
0
0
6
6
Figure 2-11. Port E Data Direction Register (DDRE)
Table 2-30. PORTE Register Field Descriptions
Table 2-29. DDRD Register Field Descriptions
Figure 2-10. Port E Data Register (PORTE)
MC9S12G Family Reference Manual,
0
0
0
0
5
5
0
0
0
0
4
4
Description
Description
3
0
0
3
0
0
Rev.1.23
0
0
0
0
2
2
Freescale Semiconductor
DDRE1
Access: User read/write
Access: User read/write
PE1
0
0
1
1
DDRE0
PE0
0
0
0
0
1
1

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