S9S12G64F0MLF Freescale Semiconductor, S9S12G64F0MLF Datasheet - Page 519

• Manufacturer Part Number: S9S12G64F0MLF
• Description: 16-bit Microcontrollers - MCU S12 Core,64kFlash,Au
• Manufacturer: Freescale Semiconductor

Specifications of S9S12G64F0MLF

• Rohs: yes
• Core: S12
• Processor Series: MC9S12G
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.13 V to 5.5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT

Chapter 15
Analog-to-Digital Converter (ADC10B16CV2)
Revision History
Freescale Semiconductor
Number
Version
V02.00
V02.01
V02.03
V02.04
V02.05
V02.06
V02.08
V02.09
V02.10
V02.11
V02.12
v02.07
18 June 2009 18 June 2009
22. Jun 2012
29. Jun 2012
09 Feb 2010
26 Feb 2010
26 Mar 2010
25 Aug 2010
09 Sep 2010
11 Feb 2011
29 Mar 2011
14 Apr 2010
02 Oct 2012
Revision
Date
22. Jun 2012
29. Jun 2012
09 Feb 2010
26 Feb 2010
16 Mar 2010
25 Aug 2010
09 Sep 2010
11 Feb 2011
29 Mar 2011
14 Apr 2010
02 Oct 2012
Effective
Date
MC9S12G Family Reference Manual, Rev.1.23
Author
Initial version copied 12 channel block guide
Updated
description of internal channels.
Updated register ATDDR (left/right justified result) description
in section
added
Fixed typo in
resolution
Corrected
description of internal channels.
Corrected typo: Reset value of ATDDIEN register
Corrected typos to be in-line with SoC level pin naming
conventions for VDDA, VSSA, VRL and VRH.
Removed feature of conversion during STOP and general
wording clean up done in
Description
Update of internal only information.
Connectivity Information regarding internal channel_6 added
to
Fixed typo in bit description field
CB, CA. Last sentence contained a wrong highest channel
number (it is not AN7 to AN0 instead it is AN15 to AN0).
Updated register wirte access information in section
15.3.2.9/15-539
Removed IP name in block diagram
Added user information to avoid maybe false external trigger
events when enabling the external trigger mode
(Section 15.4.2.1, “External Trigger
Table
Table 15-21
15-15.
Table 15-15
15.3.2.12.1/15-541
Table 15-15
Table 15-9
Description of Changes
to improve feature description.
Analog Input Channel Select Coding -
Analog Input Channel Select Coding -
- conversion result for 3mV and 10bit
Section 15.4, “Functional
and
Table 15-14
15.3.2.12.2/15-542
Input).
Figure 15-1
for bits CD, CC,
and
521