S9S12G64F0MLF Freescale Semiconductor, S9S12G64F0MLF Datasheet - Page 972

• Manufacturer Part Number: S9S12G64F0MLF
• Description: 16-bit Microcontrollers - MCU S12 Core,64kFlash,Au
• Manufacturer: Freescale Semiconductor

Specifications of S9S12G64F0MLF

• Rohs: yes
• Core: S12
• Processor Series: MC9S12G
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 2 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.13 V to 5.5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-48
• Mounting Style: SMD/SMT

64 KByte Flash Module (S12FTMRG64K1V1)
27.4.6.13 Set Field Margin Level Command
The Set Field Margin Level command, valid in special modes only, causes the Memory Controller to set
the margin level specified for future read operations of the P-Flash or EEPROM block.
Upon clearing CCIF to launch the Set Field Margin Level command, the Memory Controller will set the
field margin level for the targeted block and then set the CCIF flag.
Valid margin level settings for the Set Field Margin Level command are defined in
974
CCOBIX[2:0]
When the EEPROM block is targeted, the EEPROM field margin levels are
applied only to the EEPROM reads. However, when the P-Flash block is
targeted, the P-Flash field margin levels are applied to both P-Flash and
EEPROM reads. It is not possible to apply field margin levels to the P-Flash
block only.
Table 27-57. Set Field Margin Level Command FCCOB Requirements
000
001
1
2
(CCOBIX=001)
Table 27-58. Valid Set Field Margin Level Settings
Read margin to the erased state
Read margin to the programmed state
0x0000
0x0001
0x0002
0x0003
0x0004
CCOB
MC9S12G Family Reference Manual,
0x0E
NOTE
Return to Normal Level
FCCOB Parameters
Field Margin-1 Level
Field Margin-0 Level
User Margin-1 Level
User Margin-0 Level
Margin level setting.
Level Description
Flash block selection code [1:0]
Rev.1.23
Table 27-34
1
2
1
2
Table
. See
Freescale Semiconductor
27-58.