MT47H128M8HQ-3 L:G Micron Technology Inc, MT47H128M8HQ-3 L:G Datasheet - Page 30

• Manufacturer Part Number: MT47H128M8HQ-3 L:G
• Description: IC DDR2 SDRAM 1GBIT 3NS 60FBGA
• Manufacturer: Micron Technology Inc
• Type: DDR2 SDRAMr

Specifications of MT47H128M8HQ-3 L:G

• Format - Memory: RAM
• Memory Type: DDR2 SDRAM
• Memory Size: 1G (128M x 8)
• Speed: 3ns
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.9 V
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 60-FBGA
• Organization: 128Mx8
• Density: 1Gb
• Address Bus: 17b
• Access Time (max): 450ps
• Maximum Clock Rate: 667MHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: FBGA
• Operating Temp Range: 0C to 85C
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 135mA
• Pin Count: 60
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PDF: 09005aef821ae8bf
1GbDDR2.pdf – Rev. T 02/10 EN
4. Data bus consists of DQ, DM, DQS, DQS#, RDQS, RDQS#, LDQS, LDQS#, UDQS, and
5. Definitions for I
6. I
7. The following I
UDQS#. I
tion devices when operated outside of the range 0°C ≤ T
LOW
HIGH
Stable
Floating
Switching Inputs changing between HIGH and LOW every other clock cycle (once per
Switching Inputs changing between HIGH and LOW every other data transfer (once
When
T
When
T
DD1
C
C
≤ 0°C
≥ 85°C
, I
DD4R
DD
, and I
I
ed by 2%; and I
I
ed by 2%; I
30%; and I
T
values must be met with all combinations of EMR bits 10 and 11.
DD2P
DD0
C
V
V
Inputs stable at a HIGH or LOW level
Inputs at V
two clocks) for address and control signals
per clock) for DQ signals, not including masks or strobes
IN
IN
< 85°C and the 2X refresh option is still enabled)
, I
DD
DD
DD7
≤ V
≥ V
and I
DD1
values must be derated (I
conditions:
IL(AC)max
IH(AC)min
require A12 in EMR to be enabled during testing.
, I
DD3P(SLOW)
DD2N
DD6
DD2P
REF
must be derated by 80% (I
30
, I
= V
DD6
must be derated by 20%; I
DD2Q
Electrical Specifications – I
DDQ
and I
must be derated by 4%; I
, I
/2
DD3N
DD7
Micron Technology, Inc. reserves the right to change products or specifications without notice.
, I
must be derated by 7%
DD3P(FAST)
DD
1Gb: x4, x8, x16 DDR2 SDRAM
limits increase) on IT-option and AT-op-
, I
DD4R
DD6
DD3P(SLOW)
, I
will increase by this amount if
C
DD4R
DD4W
≤ 85°C:
© 2004 Micron Technology, Inc. All rights reserved.
and I
, and I
must be derated by
DD5W
DD
DD5W
Parameters
must be derat-
must be derat-