L6711TR STMicroelectronics, L6711TR Datasheet - Page 41

IC CTRLR 3PHASE VID/DACS 48-TQFP

L6711TR

Manufacturer Part Number
L6711TR
Description
IC CTRLR 3PHASE VID/DACS 48-TQFP
Manufacturer
STMicroelectronics
Type
Step-Down (Buck)r
Datasheet

Specifications of L6711TR

Internal Switch(s)
No
Synchronous Rectifier
No
Number Of Outputs
1
Voltage - Output
0.8 ~ 1.55 V
Current - Output
2A
Frequency - Switching
150kHz
Voltage - Input
12V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-TQFP Exposed Pad, 48-eTQFP, 48-HTQFP, 48-VQFP
Power - Output
2.5W
Output Voltage
0.8 V to 1.581 V
Output Current
95 A
Input Voltage
13.8 V
Mounting Style
SMD/SMT
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-5363-2
L6711TR

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Part Number
Manufacturer
Quantity
Price
Part Number:
L6711TR
Manufacturer:
STMicroelectronics
Quantity:
10 000
Part Number:
L6711TR
Manufacturer:
ST
0
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Manufacturer:
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Manufacturer:
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L6711
17
System control loop compensation
The control loop is composed by the Current Sharing control loop and the Average Current
Mode control loop. Each loop gives, with a proper gain, the correction to the PWM in order
to minimize the error in its regulation: the Current Sharing control loop equalize the currents
in the inductors while the Average Current Mode control loop fixes the output voltage equal
to the reference programmed by VID.
control loop.
Figure 21. Main control loop diagram
The average current mode control loop is reported in
sourced by the FB pin flows into R
from the read current.
The system can be modeled with an equivalent single phase converter which only
difference is the equivalent inductor L/3 (where each phase has an L inductor).The ACM
control loop gain results (obtained opening the loop after the COMP pin):
Where:
G
LOOP
C O R R E C T I O N
D U T Y C Y C L E
C U R R E N T
S H A R I N G
I
IN F O 3
R
selected;
Z
and the applied load Ro;
Z
Z
A(s) is the error amplifier gain;
R
I
P
F
L
IN F O 2
SENSE
D ROOP
(s) is the parallel of the three inductor impedance;
(s) is the compensation network impedance;
(s) is the impedance resulting by the parallel of the output capacitor (and its ESR)
s
I
IN F O 1
=
is the mosfet R
-------------------------------------------------------------------------------------------------------------------
=
Z
P
1 / 5
1 / 5
1 / 5
R
--------------------- R
SEN SE
s
PWM Z
Rg
+
Z
L
s
F
FB
dsON
s
is the equivalent output resistance determined by droop;
Z
--------------
A s
F
R
or the Inductor DCR depending on the sensing element
s
D ROOP
4 /5
FB
C O M P
E R R O R A M P L I F I E R
+
implementing the dependence of the output voltage
Figure 21
P W M 1
P W M 2
P W M 3
1
+
+
----------- -
A s
Z
1
P
s
Z
F
( s )
shows the block diagram of the system
R
FB
Figure
System control loop compensation
V ID
F B
22. The current information I
L 1
L 2
L 3
R
F B
I
F B
C o
R o
41/50
FB

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