L6711TR STMicroelectronics, L6711TR Datasheet - Page 8

IC CTRLR 3PHASE VID/DACS 48-TQFP

L6711TR

Manufacturer Part Number
L6711TR
Description
IC CTRLR 3PHASE VID/DACS 48-TQFP
Manufacturer
STMicroelectronics
Type
Step-Down (Buck)r
Datasheet

Specifications of L6711TR

Internal Switch(s)
No
Synchronous Rectifier
No
Number Of Outputs
1
Voltage - Output
0.8 ~ 1.55 V
Current - Output
2A
Frequency - Switching
150kHz
Voltage - Input
12V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-TQFP Exposed Pad, 48-eTQFP, 48-HTQFP, 48-VQFP
Power - Output
2.5W
Output Voltage
0.8 V to 1.581 V
Output Current
95 A
Input Voltage
13.8 V
Mounting Style
SMD/SMT
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-5363-2
L6711TR

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Pins description and connection diagrams
Table 1.
8/50
10
12
13
14
15
16
11
8
9
OUTEN
Name
VSEN
CS1+
CS1-
CS2-
OVP
FBG
FBR
FB
Pins description
This pin is connected to the error amplifier inverting input and is used to compensate the
voltage control feedback loop.
Connecting a resistor between this pin and VSEN pin allows programming the droop effect.
Over Voltage protection setup pin: it allows programming the OVP intervention.
Internally pulled-up to 5V, it sources a constant 12.5 A current.
Leaving the pin floating the OVP threshold is set to 115% (Typ.) of the programmed voltage
Connecting a resistor R
voltage (see relevant section for further details). Filter with 10nF vs. SGND in this case.
Manages Over&Under-voltage conditions. It is internally connected with the output of the
Remote Sense Buffer for Remote Sense of the regulated voltage.
If no Remote Sense is implemented, connect it directly to the regulated voltage in order to
manage OVP and UVP.
Remote sense buffer non-inverting input.
It has to be connected to the positive side of the load to perform a remote sense.
Remote sense buffer inverting input.
It has to be connected to the negative side of the load to perform a remote sense.
Output Enable pin; internally 3V pulled-up, it can be pulled-up with a resistor up to 3.3V.
If forced to a voltage lower than 0.3V, the device stops operation with all mosfets OFF: all the
protections are disabled in this condition except pre-OVP.
Cycle this pin to recover latch from protections; filter with 1nF (Typ.) capacitor vs. SGND.
Channel 1 Current Sense Negative Input pin.
It must be connected through an Rg resistor to the LS mosfet drain (or to the LS-side of the
sense resistor placed in series to the LS mosfet) if LS mosfet sense is performed
(CS_SEL=OPEN). Otherwise (CS_SEL=SGND), it must be connected to the output-side of
the output inductor (or the output-side of the sense resistor used and placed between the
channel 1 inductor and the output of the converter) through Rg resistor.
The net connecting the pin to the sense point must be routed as close as possible to the CS1+
net in order to couple in common mode any picked-up noise.
Channel 1 Current Sense Positive Input pin.
It must be connected through an Rg resistor to the LS mosfet source (or to the GND-side of
the sense resistor placed in series to the LS mosfet) if LS mosfet sense is performed
(CS_SEL=OPEN). Otherwise (CS_SEL=SGND), it must be connected to the phase-side of
the output inductor (or the inductor-side of the sense resistor used and placed between the
channel 1 inductor and the output of the converter) through Rg resistor and an R-C network
across the inductor.
The net connecting the pin to the sense point must be routed as close as possible to the CS1-
net in order to couple in common mode any picked-up noise.
Channel 2 Current Sense Negative Input pin.
It must be connected through an Rg resistor to the LS mosfet drain (or to the LS-side of the
sense resistor placed in series to the LS mosfet) if LS mosfet sense is performed
(CS_SEL=OPEN). Otherwise (CS_SEL=SGND), it must be connected to the output-side of
the output inductor (or the output-side of the sense resistor used and placed between the
channel 2 inductor and the output of the converter) through Rg resistor.
The net connecting the pin to the sense point must be routed as close as possible to the CS2+
net in order to couple in common mode any picked-up noise.
(continued)
OVP
to SGND, it sets the OVP threshold to a fixed programmable
Description
L6711

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