LPC2929FBD144,551 NXP Semiconductors, LPC2929FBD144,551 Datasheet - Page 24

IC ARM9 MCU FLASH 768K 144LQFP

LPC2929FBD144,551

Manufacturer Part Number
LPC2929FBD144,551
Description
IC ARM9 MCU FLASH 768K 144LQFP
Manufacturer
NXP Semiconductors
Series
LPC2900r
Datasheet

Specifications of LPC2929FBD144,551

Program Memory Type
FLASH
Program Memory Size
768KB (768K x 8)
Package / Case
144-LQFP
Core Processor
ARM9
Core Size
32-Bit
Speed
125MHz
Connectivity
CAN, EBI/EMI, I²C, LIN, SPI, UART/USART, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
104
Eeprom Size
16K x 8
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
1.71 V ~ 3.6 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC29
Core
ARM968E-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
56 KB
Interface Type
CAN/UART/USB
Maximum Clock Frequency
125 MHz
Number Of Programmable I/os
104
Number Of Timers
6
Operating Supply Voltage
1.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB2929, MCB2929U, MCB2929UME
Development Tools By Supplier
OM11026, OM11038
Minimum Operating Temperature
- 40 C
On-chip Adc
3 (8-ch x 10-bit)
Package
144LQFP
Device Core
ARM968E-S
Family Name
LPC2900
Maximum Speed
125 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
568-4786 - EXT BOARD MOTOR CONTROL LPC2900
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4695
935287118551
LPC2929FBD144-S

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC2929FBD144,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
LPC2926_27_29
Product data sheet
6.9.2 Pin description
6.9.3 Clock description
6.9.4 External memory timing diagrams
Table 11.
Table 12.
The external static-memory controller module in the LPC2926/2927/2929 has the
following pins, which are combined with other functions on the port pins of the
LPC2926/2927/2929.
Table 13.
The External Static Memory Controller is clocked by CLK_SYS_SMC, see
A timing diagram for reading from external memory is shown in
between the wait-state settings is indicated with arrows.
32-bit
system
address bit
field
31 to 29
28 to 26
25 and 24
23 to 0
CS[2:0]
000
001
010
011
100
101
110
111
Symbol
EXTBUS CSx
EXTBUS BLSy
EXTBUS WE
EXTBUS OE
EXTBUS A[23:0] A[23:0]
EXTBUS D[31:0] D[31:0]
External memory-bank address bit description
External static-memory controller banks
External memory controller pins
A[23:0]
bank 0
bank 1
bank 2
bank 3
bank 4
bank 5
bank 6
bank 7
Symbol
BA[2:0]
CS[2:0]
-
Bank
All information provided in this document is subject to legal disclaimers.
Pin name
CSx
BLSy
WE
OE
Rev. 5 — 28 September 2010
Table 13
external static-memory base address (three most significant bits);
chip select address space for eight memory banks; see
16 MB memory banks address space
Description
the base address can be found in the memory map; see
field contains ‘010’ when addressing an external memory bank.
always ‘00’; other values are ‘mirrors’ of the 16 MB bank address.
shows the external memory controller pins.
OUT
OUT
Direction
OUT
OUT
OUT
IN/OUT
ARM9 microcontroller with CAN, LIN, and USB
LPC2926/2927/2929
byte-lane select input y, y runs from 0 to 3
write enable (active LOW)
output enable (active LOW)
address bus
Description
memory-bank x select, x runs from 0 to 7
data bus
Figure
5. The relationship
© NXP B.V. 2010. All rights reserved.
Section
Ref.
Ref.
1. This
1.
6.7.2.
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