LPC2929FBD144,551 NXP Semiconductors, LPC2929FBD144,551 Datasheet - Page 90

• Manufacturer Part Number: LPC2929FBD144,551
• Description: IC ARM9 MCU FLASH 768K 144LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC2900r

Specifications of LPC2929FBD144,551

• Program Memory Type: FLASH
• Program Memory Size: 768KB (768K x 8)
• Package / Case: 144-LQFP
• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 125MHz
• Connectivity: CAN, EBI/EMI, I²C, LIN, SPI, UART/USART, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Eeprom Size: 16K x 8
• Ram Size: 56K x 8
• Voltage - Supply (vcc/vdd): 1.71 V ~ 3.6 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC29
• Core: ARM968E-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 56 KB
• Interface Type: CAN/UART/USB
• Maximum Clock Frequency: 125 MHz
• Number Of Programmable I/os: 104
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB2929, MCB2929U, MCB2929UME
• Development Tools By Supplier: OM11026, OM11038
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 3 (8-ch x 10-bit)
• Package: 144LQFP
• Device Core: ARM968E-S
• Family Name: LPC2900
• Maximum Speed: 125 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 568-4786 - EXT BOARD MOTOR CONTROL LPC2900
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4695; 935287118551; LPC2929FBD144-S

NXP Semiconductors
13. Abbreviations
14. References
LPC2926_27_29
Product data sheet
Table 46.
[1]
[2]
[3]
[4]
[5]
Abbreviation
AHB
AMBA
APB
BIST
CCO
CISC
DMA
DSP
DTL
EOP
ETB
ETM
FIQ
GPDMA
IRQ
LIN
LSB
MAC
MSB
MSC
PHY
PLL
Q-SPI
RISC
SFSP
TAP
TTL
UART
UM10316 — LPC29xx user manual
ARM — ARM web site
ARM-SSP — ARM primecell synchronous serial port (PL022) technical reference
manual
CAN — ISO 11898-1: 2002 road vehicles - Controller Area Network (CAN) - part 1:
data link layer and physical signalling
LIN — LIN specification package, revision 2.0
Abbreviations list
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 28 September 2010
Description
Advanced High-performance Bus
Advanced Microcontroller Bus Architecture
ARM Peripheral Bus
Built-In Self Test
Current Controlled Oscillator
Complex Instruction Set Computers
Direct Memory Access
Digital Signal Processing
Device Transaction Level
End Of Packet
Embedded Trace Buffer
Embedded Trace Macrocell
Fast Interrupt reQuest
General Purpose DMA
Interrupt ReQuest
Local Interconnect Network
Least Significant Bit
Media Access Control
Most Significant Bit
Modulation and Sampling Control
PHYsical layer
Phase-Locked Loop
Queued SPI
Reduced Instruction Set Computer
SCU Function Select Port x, y (use without the P if there are no x, y)
Test Access Port
Transistor-Transistor Logic
Universal Asynchronous Receiver Transmitter
ARM9 microcontroller with CAN, LIN, and USB
LPC2926/2927/2929
© NXP B.V. 2010. All rights reserved.
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