LPC2929FBD144,551 NXP Semiconductors, LPC2929FBD144,551 Datasheet - Page 57

IC ARM9 MCU FLASH 768K 144LQFP

LPC2929FBD144,551

Manufacturer Part Number
LPC2929FBD144,551
Description
IC ARM9 MCU FLASH 768K 144LQFP
Manufacturer
NXP Semiconductors
Series
LPC2900r
Datasheet

Specifications of LPC2929FBD144,551

Program Memory Type
FLASH
Program Memory Size
768KB (768K x 8)
Package / Case
144-LQFP
Core Processor
ARM9
Core Size
32-Bit
Speed
125MHz
Connectivity
CAN, EBI/EMI, I²C, LIN, SPI, UART/USART, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
104
Eeprom Size
16K x 8
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
1.71 V ~ 3.6 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC29
Core
ARM968E-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
56 KB
Interface Type
CAN/UART/USB
Maximum Clock Frequency
125 MHz
Number Of Programmable I/os
104
Number Of Timers
6
Operating Supply Voltage
1.8 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB2929, MCB2929U, MCB2929UME
Development Tools By Supplier
OM11026, OM11038
Minimum Operating Temperature
- 40 C
On-chip Adc
3 (8-ch x 10-bit)
Package
144LQFP
Device Core
ARM968E-S
Family Name
LPC2900
Maximum Speed
125 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
568-4786 - EXT BOARD MOTOR CONTROL LPC2900
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4695
935287118551
LPC2929FBD144-S

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC2929FBD144,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
LPC2926_27_29
Product data sheet
6.16.4.2 Pin description
6.16.5.1 Functional description
6.16.5 Power Management Unit (PMU)
The RGU module in the LPC2926/2927/2929 has the following pins.
RGU pins.
Table 31.
This module enables software to actively control the system’s power consumption by
disabling clocks not required in a particular operating mode.
Using the base clocks from the CGU as input, the PMU generates branch clocks to the
rest of the LPC2926/2927/2929. Output clocks branched from the same base clock are
phase- and frequency-related. These branch clocks can be individually controlled by
software programming.
The key features are:
The PMU controls all internal clocks coming out of the CGU0 for power-mode
management. With some exceptions, each branch clock can be switched on or off
individually under control of software register bits located in its individual configuration
register. Some branch clocks controlling vital parts of the device operate in a fixed mode.
Table 32
By programming the configuration register the user can control which clocks are switched
on or off, and which clocks are switched off when entering Power-down mode.
Note that the standby-wait-for-interrupt instructions of the ARM968E-S processor (putting
the ARM CPU into a low-power state) are not supported. Instead putting the ARM CPU
into power-down should be controlled by disabling the branch clock for the CPU.
Remark: For any disabled branch clocks to be re-activated their corresponding base
clocks must be running (controlled by CGU0).
Table 32
Every branch clock is related to one particular base clock: it is not possible to switch the
source of a branch clock in the PMU.
Symbol
RST
Individual clock control for all LPC2926/2927/2929 sub-modules.
Activates sleeping clocks when a wake-up event is detected.
Clocks can be individually disabled by software.
Supports AHB master-disable protocol when AUTO mode is set.
Disables wake-up of enabled clocks when Power-down mode is set.
Activates wake-up of enabled clocks when a wake-up event is received.
Status register is available to indicate if an input base clock can be safely switched off
(i.e. all branch clocks are disabled).
shows which mode-control bits are supported by each branch clock.
shows the relation between branch and base clocks, see also
RGU pins
All information provided in this document is subject to legal disclaimers.
Direction
IN
Rev. 5 — 28 September 2010
Description
external reset input, Active LOW; pulled up internally
ARM9 microcontroller with CAN, LIN, and USB
LPC2926/2927/2929
Table 31
© NXP B.V. 2010. All rights reserved.
Section
shows the
6.7.1.
57 of 95

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