LPC2929FBD144,551 NXP Semiconductors, LPC2929FBD144,551 Datasheet - Page 33

• Manufacturer Part Number: LPC2929FBD144,551
• Description: IC ARM9 MCU FLASH 768K 144LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC2900r

Specifications of LPC2929FBD144,551

• Program Memory Type: FLASH
• Program Memory Size: 768KB (768K x 8)
• Package / Case: 144-LQFP
• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 125MHz
• Connectivity: CAN, EBI/EMI, I²C, LIN, SPI, UART/USART, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 104
• Eeprom Size: 16K x 8
• Ram Size: 56K x 8
• Voltage - Supply (vcc/vdd): 1.71 V ~ 3.6 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC29
• Core: ARM968E-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 56 KB
• Interface Type: CAN/UART/USB
• Maximum Clock Frequency: 125 MHz
• Number Of Programmable I/os: 104
• Number Of Timers: 6
• Operating Supply Voltage: 1.8 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB2929, MCB2929U, MCB2929UME
• Development Tools By Supplier: OM11026, OM11038
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 3 (8-ch x 10-bit)
• Package: 144LQFP
• Device Core: ARM968E-S
• Family Name: LPC2900
• Maximum Speed: 125 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 568-4786 - EXT BOARD MOTOR CONTROL LPC2900
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4695; 935287118551; LPC2929FBD144-S

NXP Semiconductors
LPC2926_27_29
Product data sheet
6.13.4.1 Pin description
6.13.4.2 Clock description
6.13.4 UARTs
6.13.5 Serial Peripheral Interface (SPI)
The LPC2926/2927/2929 contains two identical UARTs located at different peripheral
base addresses. The key features are:
The UART is commonly used to implement a serial interface such as RS232. The
LPC2926/2927/2929 contains two industry-standard 550 UARTs with 16-byte transmit and
receive FIFOs, but they can also be put into 450 mode without FIFOs.
Remark: The LIN controller can be configured to provide two additional standard UART
interfaces (see
The UART pins are combined with other functions on the port pins of the
LPC2926/2927/2929.
Table 17.
The UART modules are clocked by two different clocks; CLK_SYS_PESS and
CLK_UARTx (x = 0 to 1), see
CLK_UARTx branch clock for power management. The frequency of all CLK_UARTx
clocks is identical since they are derived from the same base clock BASE_CLK_UART.
The register interface towards the system bus is clocked by CLK_SYS_PESS. The baud
generator is clocked by the CLK_UARTx.
The LPC2926/2927/2929 contains three Serial Peripheral Interface modules (SPIs) to
allow synchronous serial communication with slave or master peripherals.
The key features are:
Symbol
UARTx TXD
UARTx RXD
•
•
•
•
•
•
•
•
•
•
16-byte receive and transmit FIFOs.
Register locations conform to 550 industry standard.
Receiver FIFO trigger points at 1 byte, 4 bytes, 8 bytes and 14 bytes.
Built-in baud rate generator.
Support for RS-485/9-bit mode allows both software address detection and automatic
address detection using 9-bit mode.
Master or slave operation.
Each SPI supports up to four slaves in sequential multi-slave operation.
Supports timer-triggered operation.
Programmable clock bit rate and prescale based on SPI source clock
(BASE_SPI_CLK), independent of system clock.
Separate transmit and receive FIFO memory buffers; 16 bits wide, 32 locations deep.
UART pins
TXDx
RXDx
Pin name
Section
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 28 September 2010
Table 17
6.14.2).
OUT
IN
Direction
Section
shows the UART pins (x runs from 0 to 1).
6.7.2. Note that each UART has its own
ARM9 microcontroller with CAN, LIN, and USB
UART channel x transmit data output
UART channel x receive data input
Description
LPC2926/2927/2929
© NXP B.V. 2010. All rights reserved.
33 of 95