MC9S08DV32ACLF Freescale Semiconductor, MC9S08DV32ACLF Datasheet - Page 324

IC MCU 32K FLASH 2K RAM 48-LQFP

MC9S08DV32ACLF

Manufacturer Part Number
MC9S08DV32ACLF
Description
IC MCU 32K FLASH 2K RAM 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheets

Specifications of MC9S08DV32ACLF

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Processor Series
S08DV
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
CAN, I2C, SCI, SPI
Number Of Programmable I/os
26
Operating Supply Voltage
5.5 V
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08DZ60
On-chip Adc
12 bit, 10 channel
Controller Family/series
HCS08
No. Of I/o's
39
Ram Memory Size
2KB
Cpu Speed
40MHz
No. Of Timers
2
Digital Ic Case Style
LQFP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S08DV32ACLF
Manufacturer:
FREESCALE
Quantity:
2 000
Part Number:
MC9S08DV32ACLF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC9S08DV32ACLF
Manufacturer:
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Quantity:
2 000
Chapter 16 Timer/PWM Module (S08TPMV3)
When a channel is configured for edge-aligned PWM (CPWMS=0, MSnB=1 and ELSnB:ELSnA not =
0:0), the data direction is overridden, the TPMxCHn pin is forced to be an output controlled by the TPM,
and ELSnA controls the polarity of the PWM output signal on the pin. When ELSnB:ELSnA=1:0, the
TPMxCHn pin is forced high at the start of each new period (TPMxCNT=0x0000), and the pin is forced
low when the channel value register matches the timer counter. When ELSnA=1, the TPMxCHn pin is
forced low at the start of each new period (TPMxCNT=0x0000), and the pin is forced high when the
channel value register matches the timer counter.
324
TPMxCNTH:TPMxCNTL
TPMxCNTH:TPMxCNTL
TPMxMODH:TPMxMODL = 0x0008
TPMxCnVH:TPMxCnVL = 0x0005
TPMxMODH:TPMxMODL = 0x0008
TPMxCnVH:TPMxCnVL = 0x0005
Figure 16-3. High-True Pulse of an Edge-Aligned PWM
Figure 16-4. Low-True Pulse of an Edge-Aligned PWM
TPMxCHn
TPMxCHn
CHnF BIT
CHnF BIT
TOF BIT
TOF BIT
MC9S08DV60 Series Data Sheet, Rev 3
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