D6417709SHF200BV Renesas Electronics America, D6417709SHF200BV Datasheet - Page 521
![IC SUPER H MPU ROMLESS 208LQFP](/photos/12/31/123130/d6417709shf200bv_sml.jpg)
D6417709SHF200BV
Manufacturer Part Number
D6417709SHF200BV
Description
IC SUPER H MPU ROMLESS 208LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.D6417709SBP167BV.pdf
(809 pages)
Specifications of D6417709SHF200BV
Core Processor
SH-3
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.85 V ~ 2.15 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-QFP Exposed Pad, 208-eQFP, 208-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D6417709SHF200BV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Clock: An internal clock generated by the on-chip baud rate generator or an external clock input
from the SCK pin can be selected as the SCI transmit/receive clock. The clock source is selected
by the C/A bit in the serial mode register (SCSMR) and bits CKE1 and CKE0 in the serial control
register (SCSCR). See table 14.10.
When the SCI operates on an internal clock, it outputs the clock signal at the SCK pin. Eight clock
pulses are output per transmitted or received character. When the SCI is not transmitting or
receiving, the clock signal remains in the high state. When only receiving, the SCI receives in 2-
character units, so a 16-pulse serial clock is output. To receive in 1-character units, select an
external clock source.
Transmitting and Receiving Data SCI Initialization (Synchronous Mode): Before
transmitting, receiving, or changing the mode or communication format, the software must clear
the TE and RE bits to 0 in the serial control register (SCSCR), then initialize the SCI. Clearing TE
to 0 sets TDRE to 1 and initializes the transmit shift register (SCTSR). Clearing RE to 0, however,
does not initialize the RDRF, PER, FER, and ORER flags and receive data register (SCRDR),
which retain their previous contents.
Figure 14.18 shows a sample flowchart for initializing the SCI. The procedure for initializing the
SCI is:
1. Select the clock source in the serial control register (SCSCR). Leave RIE, TIE, TEIE, MPIE,
2. Select transmit/receive format in the serial mode register (SCSMR).
3. Write the value corresponding to the bit rate in the bit rate register (SCBRR) (not necessary if
4. Wait for at least the interval required to transmit or receive one bit, then set TE or RE in the
TE and RE cleared to 0.
an external clock is used).
serial control register (SCSCR) to 1. Also set RIE, TIE, TEIE and MPIE. Setting TE and RE
allows use of the TxD and RxD pins.
Rev. 5.00, 09/03, page 475 of 760
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