ATTINY44-15MZ Atmel, ATTINY44-15MZ Datasheet - Page 44

MCU AVR 4K FLASH 15MHZ 20-QFN

ATTINY44-15MZ

Manufacturer Part Number
ATTINY44-15MZ
Description
MCU AVR 4K FLASH 15MHZ 20-QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet

Specifications of ATTINY44-15MZ

Package / Case
20-QFN Exposed Pad
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Speed
16MHz
Number Of I /o
12
Eeprom Size
256 x 8
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
256 x 8
Program Memory Size
4KB (4K x 8)
Data Converters
A/D 8x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Connectivity
USI
Core Size
8-Bit
Processor Series
ATTINY4x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SPI, UART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY44-15MZ
Manufacturer:
ATMEL
Quantity:
1 000
Part Number:
ATTINY44-15MZ
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
9.7
9.7.1
9.8
44
Internal Voltage Reference
Watchdog Timer
Atmel ATtiny24/44/84 [Preliminary]
Voltage Reference Enable Signals and Start-up Time
Figure 9-6.
The Atmel
Brown-out Detection, and it can be used as an input to the Analog Comparator or the ADC.
The voltage reference has a start-up time that may influence the way it should be used. The
start-up time is given in
the reference is not always turned on. The reference is on during the following situations:
1. When the BOD is enabled (by programming the BODLEVEL [2..0] Fuse).
2. When the bandgap reference is connected to the Analog Comparator (by setting the
3. When the ADC is enabled.
Thus, when the BOD is not enabled, after setting the ACBG bit or enabling the ADC, the user
must always allow the reference to start up before the output from the Analog Comparator or
ADC is used. To reduce power consumption in Power-down mode, the user can avoid the
three conditions above to ensure that the reference is turned off before entering Power-down
mode.
The Watchdog Timer is clocked from an On-chip Oscillator which runs at 128kHz. By control-
ling the Watchdog Timer prescaler, the Watchdog Reset interval can be adjusted as shown in
Table 9-4 on page
The Watchdog Timer is also reset when it is disabled and when a Chip Reset occurs. Ten dif-
ferent clock cycle periods can be selected to determine the reset period. If the reset period
expires without another Watchdog Reset, the Atmel ATtiny24/44/84 resets and executes from
the Reset Vector. For timing details on the Watchdog Reset, refer to
The Wathdog Timer can also be configured to generate an interrupt instead of a reset. This
can be very helpful when using the Watchdog to wake-up from Power-down.
ACBG bit in ACSR).
CC
®
ATtiny24/44/84 features an internal bandgap reference. This reference is used for
Watchdog Reset During Operation
48. The WDR – Watchdog Reset – instruction resets the Watchdog Timer.
“System and Reset Characterizations” on page
CK
Table 9-4 on page
181. To save power,
7701E–AVR–02/11
48.

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