ATTINY44-15MZ Atmel, ATTINY44-15MZ Datasheet - Page 82

• Manufacturer Part Number: ATTINY44-15MZ
• Description: MCU AVR 4K FLASH 15MHZ 20-QFN
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY44-15MZ

• Package / Case: 20-QFN Exposed Pad
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Number Of I /o: 12
• Eeprom Size: 256 x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Program Memory Size: 4KB (4K x 8)
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Connectivity: USI
• Core Size: 8-Bit
• Processor Series: ATTINY4x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SPI, UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

13.8
82
Timer/Counter Timing Diagrams
Atmel ATtiny24/44/84 [Preliminary]
• OCR0A changes its value from MAX, as in
• The timer starts counting from a value higher than the one in OCR0A, and for that reason
The timer/counter is a synchronous design, and the timer clock (clkT0) is, therefore, shown as
a clock enable signal in the following figures. The figures include information on when interrupt
flags are set.
tion.The figure shows the count sequence close to the max value in all modes other than
phase correct PWM mode.
Figure 13-8. Timer/Counter Timing Diagram, no Prescaling
Figure 13-9 on page 82
Figure 13-9. Timer/Counter Timing Diagram, with Prescaler (f
Figure 13-10 on page 83
except CTC mode and PWM mode, where OCR0A is TOP.
is MAX the OCn pin value is the same as the result of a down-counting Compare Match. To
ensure symmetry around BOTTOM the OCn value at MAX must correspond to the result of
an up-counting Compare Match.
misses the compare match and, hence, the OCn change that would have happened on the
way up.
TCNTn
TCNTn
(clk
(clk
TOVn
TOVn
clk
clk
clk
clk
I/O
I/O
I/O
Tn
I/O
Tn
/1)
/8)
Figure 13-8 on page 82
MAX - 1
MAX - 1
shows the same timing data, but with the prescaler enabled.
shows the setting of OCF0B in all modes and OCF0A in all modes
contains timing data for basic timer/counter opera-
MAX
MAX
Figure 13-7 on page
BOTTOM
BOTTOM
clk_I/O
81. When the OCR0A value
/8)
BOTTOM + 1
BOTTOM + 1
7701E–AVR–02/11