ATSAM3S4AA-MU Atmel, ATSAM3S4AA-MU Datasheet - Page 1099

• Manufacturer Part Number: ATSAM3S4AA-MU
• Description: IC MCU 32BIT 256KB FLASH 48QFN
• Manufacturer: Atmel
• Series: SAM3Sr

Specifications of ATSAM3S4AA-MU

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 64MHz
• Connectivity: I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.62 V ~ 1.95 V
• Data Converters: A/D 8x10/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
• Processor Series: ATSAM3x
• Core: ARM Cortex M3
• 3rd Party Development Tools: JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: ATSAM3S-EK
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

44.2.2.3
44.2.3
44.2.3.1
44.2.4
44.2.4.1
6500C–ATARM–8-Feb-11
Cyclic Redundancy Check Calculation (CRCCU)
SAM-BA
ADC: Trigger Launch Only One Conversion
CRCCU: Compare Function
SAM-BA Boot: Start-up Issue when Using No Clock on XIN
A start command initiates a conversion sequence of one channel, but not of all activated chan-
nels as expected.
Send as many start commands as the number of activated channels, or use the free run mode.
The Transfer Reference Register TR_CRC offset is not CRCCU_DSCR+0x10 but
CRCCU_DSCR+0xE0.
Two Workarounds are possible:
If no crystal (between XIN/XOUT) or no ceramic resonator (between XIN/XOUT) or no bypass
mode (on XIN) is used, SAM-BA Boot may not start on some parts. As SAM-BA Boot is running
by default when the Flash is erased, the parts cannot be accessed even by JTAG under those
conditions.
Use an external crystal or ceramic resonator on XIN/XOUT, or use the Main oscillator in bypass
mode (applying a clock on XIN).
• Either do not use the compare function and process the comparison by software
• Or set the TR_CRC at the address CRCCU_DSCR+0xE0
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
SAM3S Preliminary
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