ATSAM3S4AA-MU Atmel, ATSAM3S4AA-MU Datasheet - Page 812
ATSAM3S4AA-MU
Manufacturer Part Number
ATSAM3S4AA-MU
Description
IC MCU 32BIT 256KB FLASH 48QFN
Manufacturer
Atmel
Series
SAM3Sr
Specifications of ATSAM3S4AA-MU
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 1.95 V
Data Converters
A/D 8x10/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
Processor Series
ATSAM3x
Core
ARM Cortex M3
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3S-EK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATSAM3S4AA-MU
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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35.12 HSMCI Transfer Done Timings
35.12.1
35.12.2
35.12.3
812
SAM3S Preliminary
Definition
Read Access
Write Access
The XFRDONE flag in the HSMCI_SR indicates exactly when the read or write sequence is
finished.
During a read access, the XFRDONE flag behaves as shown in
Figure 35-11. XFRDONE During a Read Access
During a write access, the XFRDONE flag behaves as shown in
Figure 35-12. XFRDONE During a Write Access
CMDRDY flag
XFRDONE flag
Data bus - D0
Not busy flag
CMD line
D0
XFRDONE flag
CMDRDY flag
Not busy flag
CMD line
Data
HSMCI write CMD
HSMCI read CMD
Card response
Card response
1st Block
1st Block
1st Block
The CMDRDY flag is released 8 tbit after the end of the card response.
The CMDRDY flag is released 8 tbit after the end of the card response.
Last Block
Last Block
Last Block
Figure
Figure
D0 is tied by the card
35-11.
35-12.
D0 is released
6500C–ATARM–8-Feb-11
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