ATSAM3S4AA-MU Atmel, ATSAM3S4AA-MU Datasheet - Page 46
ATSAM3S4AA-MU
Manufacturer Part Number
ATSAM3S4AA-MU
Description
IC MCU 32BIT 256KB FLASH 48QFN
Manufacturer
Atmel
Series
SAM3Sr
Specifications of ATSAM3S4AA-MU
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 1.95 V
Data Converters
A/D 8x10/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
Processor Series
ATSAM3x
Core
ARM Cortex M3
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3S-EK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATSAM3S4AA-MU
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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10.4.3.6
• N
Negative or less than flag:
0 = operation result was positive, zero, greater than, or equal
1 = operation result was negative or less than.
• Z
Zero flag:
0 = operation result was not zero
1 = operation result was zero.
46
31
23
15
N
7
SAM3S Preliminary
Application Program Status Register
30
22
14
Z
6
The PSR bit assignments are:
Access these registers individually or as a combination of any two or all three registers, using
the register name as an argument to the MSR or MRS instructions. For example:
The PSR combinations and attributes are:
Table 10-3.
1.
2.
See the instruction descriptions
tion about how to access the program status registers.
The APSR contains the current state of the condition flags from previous instruction executions.
See the register summary in
Register
PSR
IEPSR
IAPSR
EAPSR
• read all of the registers using PSR with the MRS instruction
• write to the APSR using APSR with the MSR instruction.
The processor ignores writes to the IPSR bits.
Reads of the EPSR bits return zero, and the proces-
29
21
13
C
5
sor ignores writes to the these bits.
Type
RW
RO
RW
RW
PSR register combinations
(1)
(2)
(1), (2)
ICI/IT
EPSR and IPSR
Combination
APSR, EPSR, and IPSR
APSR and IPSR
APSR and EPSR
28
20
12
V
4
ISR_NUMBER
Table 10-2 on page 44
Reserved
“MRS” on page 143
27
19
11
Q
3
for its attributes. The bit assignments are:
and
26
18
10
2
“MSR” on page 144
ICI/IT
Reserved
25
17
9
1
6500C–ATARM–8-Feb-11
for more informa-
ISR_NUMBER
24
16
T
8
0
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