ATSAM3S4AA-MU Atmel, ATSAM3S4AA-MU Datasheet - Page 955
ATSAM3S4AA-MU
Manufacturer Part Number
ATSAM3S4AA-MU
Description
IC MCU 32BIT 256KB FLASH 48QFN
Manufacturer
Atmel
Series
SAM3Sr
Specifications of ATSAM3S4AA-MU
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 1.95 V
Data Converters
A/D 8x10/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
Processor Series
ATSAM3x
Core
ARM Cortex M3
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3S-EK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATSAM3S4AA-MU
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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37.7.10
Name:
Address:
Access:
WARNING: Due to synchronization between MCK and UDPCK, the software application must wait for the end of the write
operation before executing another write by polling the bits which must be set/cleared.
6500C–ATARM–8-Feb-11
#if defined ( __ICCARM__ )
#elif defined
#endif
/// Bitmap for all status bits in CSR that are not effected by a value 1.
#define REG_NO_EFFECT_1_ALL
/// Sets the specified bit(s) in the UDP_CSR register.
/// \param endpoint The endpoint number of the CSR to process.
/// \param flags The bitmap to set to 1.
#define SET_CSR(endpoint, flags) \
for( nop_count=0; nop_count<15; nop_count++ ) {\
EPEDS
DIR
31
23
15
#define nop() (__no_operation())
#define nop()
–
7
{ \
UDP Endpoint Control and Status Register
volatile unsigned int reg; \
reg = AT91C_BASE_UDP->UDP_CSR[endpoint] ; \
reg |= REG_NO_EFFECT_1_ALL; \
reg |= (flags); \
AT91C_BASE_UDP->UDP_CSR[endpoint] = reg; \
}\
RX_DATA_
BK1
30
22
14
UDP_CSRx [x = 0..7]
0x40034030
Read-write
–
–
6
(
nop();\
__asm__ __volatile__ ( "nop" )
__GNUC__
FORCE
STALL
29
21
13
–
–
5
| AT91C_UDP_RX_DATA_BK1\
| AT91C_UDP_STALLSENT\
| AT91C_UDP_RXSETUP\
| AT91C_UDP_TXCOMP
)
AT91C_UDP_RX_DATA_BK0\
TXPKTRDY
28
20
12
–
–
4
RXBYTECNT
STALLSENT
ISOERROR
DTGLE
27
19
11
–
3
RXSETUP
26
18
10
2
SAM3S Preliminary
RXBYTECNT
RX_DATA_
EPTYPE
BK0
25
17
9
1
TXCOMP
24
16
8
0
955
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