ATSAM3S4AA-MU Atmel, ATSAM3S4AA-MU Datasheet - Page 466
ATSAM3S4AA-MU
Manufacturer Part Number
ATSAM3S4AA-MU
Description
IC MCU 32BIT 256KB FLASH 48QFN
Manufacturer
Atmel
Series
SAM3Sr
Specifications of ATSAM3S4AA-MU
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 1.95 V
Data Converters
A/D 8x10/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
Processor Series
ATSAM3x
Core
ARM Cortex M3
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3S-EK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATSAM3S4AA-MU
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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26.16.21 PMC Write Protect Mode Register
Name:
Address:
Access:
Reset:
• WPEN: Write Protect Enable
0 = Disables the Write Protect if WPKEY corresponds to 0x504D43 (“PMC” in ASCII).
1 = Enables the Write Protect if WPKEY corresponds to 0x504D43 (“PMC” in ASCII).
Protects the registers:
• WPKEY: Write Protect KEY
Should be written at value 0x504D43 (“PMC” in ASCII). Writing any other value in this field aborts the write operation of the
WPEN bit. Always reads as 0.
466
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
“PMC System Clock Enable Register” on page 444
“PMC System Clock Disable Register” on page 445
“PMC Peripheral Clock Enable Register 0” on page 447
“PMC Peripheral Clock Disable Register 0” on page 448
“PMC Clock Generator Main Oscillator Register” on page 450
“PMC Clock Generator PLLA Register” on page 453
“PMC Clock Generator PLLB Register” on page 454
“PMC Master Clock Register” on page 455
“PMC USB Clock Register” on page 456
“PMC Programmable Clock Register” on page 457
“PMC Fast Startup Mode Register” on page 463
“PMC Fast Startup Polarity Register” on page 464
“PMC Peripheral Clock Enable Register 1” on page 468
“PMC Peripheral Clock Disable Register 1” on page 469
“PMC Oscillator Calibration Register” on page 471
31
23
15
—
7
SAM3S Preliminary
PMC_WPMR
0x400E04E4
Read-write
See
Table 26-3
30
22
14
—
6
29
21
13
—
5
28
20
12
—
4
WPKEY
WPKEY
WPKEY
27
19
11
—
3
26
18
10
—
2
25
17
—
9
1
6500C–ATARM–8-Feb-11
WPEN
24
16
8
0
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