ATSAM3S4AA-MU Atmel, ATSAM3S4AA-MU Datasheet - Page 421
ATSAM3S4AA-MU
Manufacturer Part Number
ATSAM3S4AA-MU
Description
IC MCU 32BIT 256KB FLASH 48QFN
Manufacturer
Atmel
Series
SAM3Sr
Specifications of ATSAM3S4AA-MU
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
64MHz
Connectivity
I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 1.95 V
Data Converters
A/D 8x10/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
Processor Series
ATSAM3x
Core
ARM Cortex M3
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3S-EK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATSAM3S4AA-MU
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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25. Clock Generator
25.1
25.2
6500C–ATARM–8-Feb-11
Description
Embedded Characteristics
The Clock Generator User Interface is embedded within the Power Management Controller and
is described in
the Clock Generator registers are named CKGR_.
The Clock Generator is made up of:
It provides the following clocks:
PLLBCK is the output of the Divider and 60 to 130 MHz programmable PLL (PLLB)
• A Low Power 32,768 Hz Slow Clock Oscillator with bypass mode
• A Low Power RC Oscillator
• A 3 to 20 MHz Crystal or Ceramic Resonator-based Oscillator which can be bypassed
• A factory programmed Fast RC Oscillator, 3 output frequencies can be selected: 4, 8 or
• Two 60 to 130 MHz programmable PLL (input from 3.5 to 20 MHz), capable of providing the
• SLCK, the Slow Clock, which is the only permanent clock within the system
• MAINCK is the output of the Main Clock Oscillator selection: either the Crystal or Ceramic
• PLLACK is the output of the Divider and 60 to 130 MHz programmable PLL (PLLA)
12 MHz. By default 4 MHz is selected.
clock MCK to the processor and to the peripherals.
Resonator-based Oscillator or 4/8/12 MHz Fast RC Oscillator
Section 26.16 ”Power Management Controller (PMC) User
SAM3S Preliminary
Interface”. However,
421
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